LFEC6E-5FN484C Lattice, LFEC6E-5FN484C Datasheet - Page 51

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LFEC6E-5FN484C

Manufacturer Part Number
LFEC6E-5FN484C
Description
FPGA - Field Programmable Gate Array 6.1 LUT 224 I/O
Manufacturer
Lattice
Datasheet

Specifications of LFEC6E-5FN484C

Number Of Gates
6100
Number Of Logic Blocks
768
Number Of Macrocells
6100
Maximum Operating Frequency
420 MHz
Number Of Programmable I/os
224
Data Ram Size
94208
Delay Time
5 ns
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Package / Case
FPBGA-484
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Number Of Logic Elements/cells
*
Number Of Labs/clbs
*
Total Ram Bits
*
Number Of I /o
*
Voltage - Supply
*
Mounting Type
*
Operating Temperature
*
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LFEC6E-5FN484C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Lattice Semiconductor
LatticeECP/EC External Switching Characteristics (Continued)
Figure 3-5. DDR Timings
t
t
f
Primary and Secondary Clock
f
t
t
1. General timing numbers based on LVCMOS2.5V, 12 mA. Loading of 0 pF.
2. Using LVDS I/O standard.
3. DDR timing numbers based on SSTL I/O.
4. DDR specifications are characterized but not tested.
5. UI is average bit period.
6. Based on a single primary clock.
7. These timing numbers were generated using ispLEVER design tool. Exact performance may vary with design and tool version. The tool
Timing v.G 0.30
DQVBS
DQVAS
MAX_DDR
MAX_PRI
W_PRI
SKEW_PRI
Parameter
uses internal parameters that have been characterized but are not tested on every device.
2
Data Valid Before DQS
Data Valid After DQS
DDR Clock Frequency
Frequency for Primary Clock Tree
Clock Pulse Width for Primary
Clock
Primary Clock Skew within an I/O
Bank
Description
DQ and DQS Read Timings
DQS
DQ
DQ and DQS Write Timings
DQS
DQ
6
Over Recommended Operating Conditions
All
All
All
All
All
All
Device
t
DQVBS
t
DVADQ
3-15
t
DVEDQ
Min.
0.20
0.20
1.19
t
DQVAS
95
-5
Max.
200
420
250
DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
Min.
0.20
0.20
1.19
95
-4
Max.
166
378
300
Min.
0.20
0.20
1.19
95
-3
Max.
133
340
350
Units
MHz
MHz
UI
UI
ns
ps

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