Z8622912PSG Zilog, Z8622912PSG Datasheet - Page 17

no-image

Z8622912PSG

Manufacturer Part Number
Z8622912PSG
Description
IC CCD W/2ND I2C ADD 18-DIP
Manufacturer
Zilog
Type
Video Decoderr
Datasheet

Specifications of Z8622912PSG

Applications
Set-Top Boxes, TV
Voltage - Supply, Digital
4.75 V ~ 5.25 V
Mounting Type
Through Hole
Package / Case
18-DIP (0.300", 7.62mm)
Processor Series
Z8622x
Core
Z80
Data Bus Width
8 bit
Program Memory Type
CGROM
Program Memory Size
3.7 B
Maximum Clock Frequency
12 MHz
Operating Supply Voltage
4.75 V to 5.25 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply, Analog
-
Lead Free Status / Rohs Status
 Details
ZiLOG
The XDSG mode is the GRAZE (channel grazing) display
(Figure 7). The display contains three rows of information
at the top of the screen that have been formatted for easy
reading. They contain the following XDS packet informa-
tion:
The XDSF mode is the FULL (information) display (Figure
8). This display shows the same information as the GRAZE
display; however, this display adds the program type as well
the first four program description rows (if transmitted). Al-
though XDS defines eight program description rows, the
first four are identified as containing the most important in-
formation. The display of Program Description is limited
to the first four rows. This limitation occurs because:
1. Eight rows would obscure much of the screen.
2. More than four rows are not likely to be sent due to the
Because 15 scan lines per row mode are being used, rows
10–13 appear at the bottom of the screen.
time required for transmission.
OSD Row 1
Figure 7. XDSG (Graze) Mode Sample Display
Program Length
Network Name
Program Name
OSD Row 3
OSD Row 2
Time in Show
Call Letters
When an XDS display mode has been selected, the infor-
mation is displayed as the appropriate packets are received.
The display remains on-screen as long as valid XDS data
continues to be received. If the 16-Second Erase Timer is
enabled (the default condition), the XDS display is erased
when no valid XDS data has been received for 16 Seconds.
If subsequent XDS data is received with displayable pack-
ets, that information reappears on the screen. XDS data re-
covery can be active in the XDS display mode.
The XDS display mode is turned off by selecting a different
display mode.
Display Erase and Autoblanking
The display is erased in the Text mode by the Start Text
command (but the box is maintained) and in the CAPTION
mode by the Erase Displayed Memory (EDM) command.
The non-displayed memory can be erased by the Erase Non-
displayed Memory (ENM) command.
Four other events can also cause the display to be erased.
1. The first action is a change in the display mode, such
2. A loss of video lock, such as on a channel change, can
3. The third action that clears the displayed memory is
as from CC1 to T1 or CC1 to XDSF. A change in
display mode clears the memory and the display.
cause the screen to be cleared. The current active
display mode is not changed. For example, if CC1 is
selected and ON before the channel change, the device
will remain in the CC1/ON state after the channel
change.
when the autoblanking circuit is activated. The
autoblanking circuit monitors the presence of a Line
OSD Row 1
Figure 8. XDSF Mode Sample Display
Program Name
Program Length
Program Description information goes
here on OSD rows 10, 11
Network Name
OSD Row 3
OSD Row 2
Time in Show
Call Letters
12 and,
13

Related parts for Z8622912PSG