Z8622912PSG Zilog, Z8622912PSG Datasheet - Page 49

no-image

Z8622912PSG

Manufacturer Part Number
Z8622912PSG
Description
IC CCD W/2ND I2C ADD 18-DIP
Manufacturer
Zilog
Type
Video Decoderr
Datasheet

Specifications of Z8622912PSG

Applications
Set-Top Boxes, TV
Voltage - Supply, Digital
4.75 V ~ 5.25 V
Mounting Type
Through Hole
Package / Case
18-DIP (0.300", 7.62mm)
Processor Series
Z8622x
Core
Z80
Data Bus Width
8 bit
Program Memory Type
CGROM
Program Memory Size
3.7 B
Maximum Clock Frequency
12 MHz
Operating Supply Voltage
4.75 V to 5.25 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply, Analog
-
Lead Free Status / Rohs Status
 Details
ZiLOG
APPLICATION INFORMATION
The recommended schematic, component placement, and
PCB layout for a single-sided DIP design are provided in
the following figures. EMI and noise in the video frequency
range is kept to an absolute minimum by running the ground
plane underneath the entire Z86229 package length. This
design is recommended for both SOIC and DIP package
styles. Though it is not shown in the following application
information, the SMS (pin 6) must be grounded for I
plication. If necessary, please contact your local ZiLOG
sales office with any questions regarding this or other in-
formation represented in this document.
.
Figure 29. Z86229 Application Circuit with I
C2
Table 22. Recommended Component Values
C1
C4
I
2
R2
C Bus
R3
for the Z86229 Application Circuit
C5
C3
14
15
13
6
9
8
7
4
5
VIN/INTRO
SDA
SCK
SEN
SMS
HIN
LPF
CSYNC
VIDEO
Z86229
V
SS
11
I
(A)
2
C SEL
RREF
BOX
VDD
SDO
R
G
B
18
17
12
10
CA1
2
3
1
To select 1st
I
2
R1
C Address
L1
µ
µ
µ
µ
µ
CB1
2
C
+5V
2
C ap-
GN
SEN
HIN
SMS
VIDEO
BL
Figure 30. Z86229 Application Circuit with I
C3
U1
L1
RD
BOX
SDO
SCK
SDAOUT
VIN/INTRO
VDD(+5V)
VSS
2
C

Related parts for Z8622912PSG