Z8622912PSG Zilog, Z8622912PSG Datasheet - Page 33

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Z8622912PSG

Manufacturer Part Number
Z8622912PSG
Description
IC CCD W/2ND I2C ADD 18-DIP
Manufacturer
Zilog
Type
Video Decoderr
Datasheet

Specifications of Z8622912PSG

Applications
Set-Top Boxes, TV
Voltage - Supply, Digital
4.75 V ~ 5.25 V
Mounting Type
Through Hole
Package / Case
18-DIP (0.300", 7.62mm)
Processor Series
Z8622x
Core
Z80
Data Bus Width
8 bit
Program Memory Type
CGROM
Program Memory Size
3.7 B
Maximum Clock Frequency
12 MHz
Operating Supply Voltage
4.75 V to 5.25 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply, Analog
-
Lead Free Status / Rohs Status
 Details
ZiLOG
Caption Activity Register Address = 08h
D
bits for the Line 21 data channels CC1–T4. Each bit is set
High when a mode setting command for its data channel has
been received on Line 21. The bit is cleared to the Low state
if no activity is detected in that data channel during the next
12–16 seconds or if there is a loss of lock.
XDS Data Recovery
The Z86229 is able to recover Extended Data Services
(XDS) information from the input video signal. This data,
formatted according to EIA–608 specification, can contain
a wide variety of information about current and future pro-
grams, the channel currently tuned, other channels, and mis-
cellaneous data including time of day.
Note:
The Z86229 can recover XDS data even while performing
its normal caption decoder or OSD functions.
XDS data packets are tagged according to a Class/Type sys-
tem defined by the EIA–608 specification. The Z86229 can
be programmed to filter the XDS data stream to extract only
the classes of interest to the application. An additional level
of filtering is provided that permits selection of certain
groups of packets that are useful in specific applications.
XDS filtering not only reduces the traffic on the serial bus,
but it also reduces the load of the TV/VCR control proces-
sor, thereby simplifying external XDS decoding.
XDS data recovery is enabled by selecting one or more
classes in the XDS Filter register. Optionally, a secondary
filter code can be specified which further limits the packets
to be recovered. When XDS recovery is enabled, filtered
data pairs are loaded into the serial output registers of the
Z86229 immediately upon receipt and in the order received.
The DAV and RD2 bits of the Serial Status (SS) register
then goes High, indicating the availability of two output
Bit
0
Figure 27. Caption Activity Register (Address = 08h)
–D
7
T4
D
R
XDS data is only present in the even field.
–Activity Bits.
7
D
T3
R
6
T2
D
R
5
These locations indicate the activity
D
T1
R
4
CC4
D
R
3
CC3
D
R
2
CC2
D
R
1
CC1
R
D
0
bytes. The external TV control processor is not required to
send a READ SELECT command in order to read these data
bytes.
When the XDS Filter register is set to 00h (the default state),
XDS recovery is disabled.
Caution:
Some examples of the WRITE commands used to set the
XDS Filter Register in the Z86229 are indicated in Table
18. The XDS Filter Register bit assignments are defined in
the Z86229 Internal Register section of this specification
(see page 30 for details).
When XDS data recovery is enabled, the external con-
troller should never perform any other read operation,
except for SS reads in the beginning of field 2. This
situation is most easily accomplished by using the end
of field (EOF) or data line end (DLE) interrupt to lo-
cate the end of field 2 or the vertical blanking interval
(VBI) of field 1. From that point, the controller can
perform the READ SELECT and READ functions
during this portion of the video frame. Commands oth-
er than READ SELECTS do not interfere with XDS
data recovery regardless of their position in the video
frame.
Table 18. XDS Data Extraction—
Blocking
Example Filter Settings
Program

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