ADV7173KST Analog Devices Inc, ADV7173KST Datasheet - Page 27
![IC DAC VIDEO NTSC 6-CH 48LQFP](/photos/6/59/65923/505-48-lqfp_sml.jpg)
ADV7173KST
Manufacturer Part Number
ADV7173KST
Description
IC DAC VIDEO NTSC 6-CH 48LQFP
Manufacturer
Analog Devices Inc
Type
Video Encoderr
Datasheet
1.ADV7173KSTZ.pdf
(60 pages)
Specifications of ADV7173KST
Rohs Status
RoHS non-compliant
Applications
Multimedia
Voltage - Supply, Analog
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Package / Case
48-LQFP
Number Of Dac's
6
Adc/dac Resolution
10b
Screening Level
Commercial
Package Type
LQFP
Pin Count
48
For Use With
EVAL-ADV7173EBM - BOARD EVAL FOR ADV7173
Voltage - Supply, Digital
-
Lead Free Status / RoHS Status
Not Compliant
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MODE REGISTER 0 MR0 (MR07–MR00)
(Address (SR4–SR0) = 00H)
Figure 44 shows the various operations under the control of
Mode Register 0.
MR0 BIT DESCRIPTION
Output Video Standard Selection (MR01–MR00)
These bits are used to set up the encoder mode. The ADV7172/
ADV7173 can be set up to output NTSC, PAL (B, D, G, H, I),
PAL M or PAL N standard video.
Luma Filter Select (MR02–MR04)
These bits specify which luma filter is to be selected. The
filter selection is made independent of whether PAL or
NTSC is selected.
Chroma Filter Select (MR05–MR07)
These bits select the chroma filter. A low-pass filter can be
selected with a choice of cutoff frequencies (0.65 MHz, 1.0 MHz,
1.3 MHz, or 2 MHz), along with a choice of CIF or QCIF filters.
ZERO SHOULD BE
WRITTEN TO
MR07 MR06
THIS BIT
0
0
0
0
1
1
1
1
MR17
MR17
0
0
1
1
0
0
1
1
MR16
MR07
LOW POWER MODE
0
1
CHROMA FILTER SELECT
MR05
CONTROL
0
1
0
1
0
1
0
1
DISABLE
ENABLE
MR16
1.3MHz LOW-PASS FILTER
0.65MHz LOW-PASS FILTER
1.0MHz LOW-PASS FILTER
2.0MHz LOW-PASS FILTER
RESERVED
CIF
QCIF
RESERVED
MR06
MR15
0
1
DAC C CONTROL
POWER-DOWN
NORMAL
DAC A
MR15
MR05
MR14
0
1
DAC C CONTROL
MR04 MR03
0
0
0
0
1
1
1
1
POWER-DOWN
NORMAL
DAC B
MR14
MR04
0
0
1
0
0
0
1
1
MR13
LUMA FILTER SELECT
MR02
0
1
DAC C CONTROL
0
1
0
1
0
1
0
1
MR13
POWER-DOWN
NORMAL
MODE REGISTER 1 MR1 (MR17–MR10)
(Address (SR4–SR0) = 01H)
Figure 45 shows the various operations under the control of
Mode Register 1.
MR1 BIT DESCRIPTION
DAC Control (MR15–MR10)
MR15–MR10 bits can be used to power down the DACs. This
can be used to reduce the power consumption of the ADV7172/
ADV7173 if any of the DACs are not required in the application.
Low Power Mode Control (MR16)
This bit enables the lower power mode of the ADV7172/
ADV7173. This will reduce by approximately 50% the average
supply current consumed by each large DAC which is powered
on. For each DAC in low power mode, the relationship between
R
Appendix 8). This bit is only relevant to the larger DACs,
DACs A, B, and C. DACs D, E, and F are not affected by this
low power mode.
Reserved (MR17)
A Logic “0” must be written to this bit.
DAC C
LOW-PASS FILTER (NTSC)
LOW-PASS FILTER (PAL)
NOTCH FILTER (NTSC)
NOTCH FILTER (PAL)
EXTENDED MODE
CIF
QCIF
RESERVED
MR03
SET1
MR12
/V
0
1
DAC C CONTROL
REF
MR12
POWER-DOWN
NORMAL
DAC D
MR02
and the output current is unchanged by this (see
MR01 MR00
MR11
0
0
1
1
0
1
DAC C CONTROL
STANDARD SELECTION
MR11
MR01
POWER-DOWN
NORMAL
OUTPUT VIDEO
0
1
0
1
DAC E
NTSC
PAL (B, D, G, H, I)
PAL (M)
PAL (N)
MR10
0
1
DAC C CONTROL
MR10
MR00
ADV7172/ADV7173
POWER-DOWN
NORMAL
DAC F