PI7C9X7954AFDE Pericom Semiconductor, PI7C9X7954AFDE Datasheet - Page 14
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PI7C9X7954AFDE
Manufacturer Part Number
PI7C9X7954AFDE
Description
IC PCIE-TO-UART BRIDGE 128LQFP
Manufacturer
Pericom Semiconductor
Specifications of PI7C9X7954AFDE
Applications
PCIe-to-Uart Bridge
Interface
Advanced Configuration Power Interface (ACPI)
Voltage - Supply
1.8V, 3.3V
Package / Case
128-LQFP
Mounting Type
Surface Mount
Transmitter And Receiver Fifo Counter
Yes
Package Type
LQFP
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PI7C9X7954AFDE
Manufacturer:
PERICOM
Quantity:
2
Company:
Part Number:
PI7C9X7954AFDE
Manufacturer:
Pericom
Quantity:
197
4.2.4.
September 2009 – Revision 1.3
Pericom Semiconductor
TEST SIGNALS
PIN NO.
*48, *47,
*46, *45,
*44, *43,
*39, *38
14
PIN NO.
106
109
107
108
110
5
37
97, 102, 103,
104, 105,
111, 112,
113, 114
NAME
GPIO [7:0]
WAKEUP_L
NAME
JTG_TDI
JTG_TDO
JTG_TMS
JTG_TCK
JTG_TRST_L
SCAN_EN
TEST
NC
09-0088
TYPE
TYPE
I/O
O
O
I
I
I
I
I
I
Page 14 of 70
DESCRIPTION
General-Purpose Bi-Direction Signals / SR_ORG: These eight
general-purpose pins are programmed as either input-only or
bi-directional pins by writing the GPIO output enable control
register. GPIO[2] is a bi-directional signal with a weak internal
pull-up resistor, and other GPIO pins are bi-directional signals with
weak internal pull-down resistors.
EEPROM Organization Pin (SR_ORG): During system
initialization, GPIO[7] acts as the SR_ORG pin, and it is used to
select the organization structure of the EEPROM. The pin is
active-high. When it is asserted at start-up, the EEPROM
configuration data is organized in 16-bit structure. Otherwise, 8-bit
structure is used.
Receiver Termination Adjustment (RXTERMADJ[1:0]): During
system initialization, GPIO[6:5] acts as the RXTERMADJ[1:0] pins,
and they are used to adjust the receive termination resistor value. By
default, they are set to ‘00’ without pin strapped.
Transmit Termination Adjustment (TXTERMADJ[1:0]): During
system initialization, GPIO[4:3] acts as the TXTERMADJ[1:0] pins,
and they are used to adjust the transmit termination resistor value.
By default, they are set to “00” without pin strapped.
Driver Equalization Level Control (DEQ[3:1]): During system
initialization, GPIO[2:0] acts as the DEQ[3:1] pins, and they are
used to control the driver current level. By default, they are set to
‘100’ without pin strapped.
Wakeup Signal (Active LOW): When the Ring Indicator is
received on UART channel 0 in L2 state, the WAKEUP_L is
asserted. WAKEUP_L is an output signal with a weak internal
pull-down resistor.
DESCRIPTION
Test Data Input: When SCAN_EN is high, the pin is used (in
conjunction with TCK) to shift data and instructions into the TAP in
a serial bit stream. JTG_TDI is an input signal with a weak internal
pull-up resistor.
Test Data Output: When SCAN_EN is high, it is used (in
conjunction with TCK) to shift data out of the Test Access Port
(TAP) in a serial bit stream
Test Mode Select: Used to control the state of the Test Access Port
controller. JTG_TMS is an input signal with a weak internal pull-up
resistor.
Test Clock: Used to clock state information and data into and out of
the chip during boundary scan.
Test Reset: Active LOW signal to reset the TAP controller into an
initialized state. JTG_TRST_L is an input signal with a weak
internal pull-up resistor.
Scan Test Enable Pin: SCAN_EN is an input signal with a weak
internal pull-up resistor.
This input signal should be tied to ground during normal operation.
These pins can be left floating.
PCI Express® Quad UART
PI7C9X7954
Datasheet