PI7C9X7954AFDE Pericom Semiconductor, PI7C9X7954AFDE Datasheet - Page 37
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PI7C9X7954AFDE
Manufacturer Part Number
PI7C9X7954AFDE
Description
IC PCIE-TO-UART BRIDGE 128LQFP
Manufacturer
Pericom Semiconductor
Specifications of PI7C9X7954AFDE
Applications
PCIe-to-Uart Bridge
Interface
Advanced Configuration Power Interface (ACPI)
Voltage - Supply
1.8V, 3.3V
Package / Case
128-LQFP
Mounting Type
Surface Mount
Transmitter And Receiver Fifo Counter
Yes
Package Type
LQFP
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PI7C9X7954AFDE
Manufacturer:
PERICOM
Quantity:
2
Company:
Part Number:
PI7C9X7954AFDE
Manufacturer:
Pericom
Quantity:
197
6.2.52. DEVICE STATUS REGISTER – OFFSET E8h
6.2.53. LINK CAPABILITIES REGISTER – OFFSET ECh
September 2009 – Revision 1.3
Pericom Semiconductor
BIT
3
4
7:5
8
9
10
11
14:12
15
BIT
16
17
18
19
20
21
31:22
BIT
FUNCTION
Unsupported
Request Reporting
Enable
Enable Relaxed
Ordering
Max_Payload_Size
Extended Tag Field
Enable
Phantom Function
Enable
Auxiliary (AUX)
Power PM Enable
Enable No Snoop
Max_Read_
Request_Size
Reserved
FUNCTION
Correctable Error
Detected
Non-Fatal Error
Detected
Fatal Error Detected
Unsupported
Request Detected
AUX Power
Detected
Transactions
Pending
Reserved
FUNCTION
09-0088
TYPE
RW1C
RW1C
RW1C
RW1C
TYPE
TYPE
RWS
RO
RO
RO
RW
RW
RO
RO
RO
RO
RO
RO
Page 37 of 70
DESCRIPTION
Asserted when correctable error is detected. Errors are logged in this
register regardless of whether error reporting is enabled or not in the
Device Control register.
Reset to 0b.
Asserted when non-fatal error is detected. Errors are logged in this
register regardless of whether error reporting is enabled or not in the
Device Control register.
Reset to 0b.
Asserted when fatal error is detected. Errors are logged in this
register regardless of whether error reporting is enabled or not in the
Device Control register.
Reset to 0b.
Asserted when unsupported request is detected. Errors are logged in
this register regardless of whether error reporting is enabled or not in
the Device Control register.
Reset to 0b.
Asserted when the AUX power is detected by the I/O bridge
Reset to 1b.
It is not implemented. Hardwired to 0b.
DESCRIPTION
Reset to 000h.
DESCRIPTION
0b: Disable Unsupported Request Reporting.
1b: Enable Unsupported Request Reporting.
Reset to 0b.
It is not implemented.
Reset to 0b.
This field sets maximum TLP payload size for the device.
Permissible values that can be programmed are indicated by the
Max_Payload_Size Supported in the Device Capabilities register.
Any value exceeding the Max_Payload_Size Supported written to
this register results into clamping to the Max_Payload_Size
Supported value.
Reset to 000b.
It is not implemented. Hardwired to 0b.
It is not implemented. Hardwired to 0b.
When set, indicates that the I/O bridge is enabled to draw AUX
power independent of PME AUX power.
Reset to 0b.
It is not implemented. Hardwired to 0b.
It is not implemented. Hardwired to 000b.
Reset to 0b.
PCI Express® Quad UART
PI7C9X7954
Datasheet