PI7C9X7954AFDE Pericom Semiconductor, PI7C9X7954AFDE Datasheet - Page 21
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PI7C9X7954AFDE
Manufacturer Part Number
PI7C9X7954AFDE
Description
IC PCIE-TO-UART BRIDGE 128LQFP
Manufacturer
Pericom Semiconductor
Specifications of PI7C9X7954AFDE
Applications
PCIe-to-Uart Bridge
Interface
Advanced Configuration Power Interface (ACPI)
Voltage - Supply
1.8V, 3.3V
Package / Case
128-LQFP
Mounting Type
Surface Mount
Transmitter And Receiver Fifo Counter
Yes
Package Type
LQFP
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PI7C9X7954AFDE
Manufacturer:
PERICOM
Quantity:
2
Company:
Part Number:
PI7C9X7954AFDE
Manufacturer:
Pericom
Quantity:
197
PI7C9X7954
PCI Express® Quad UART
Datasheet
5.2.9.
Automated Flow Control
The device uses automatic in-band flow control to prevent data-overrun to the local receive FIFO and
remote receive FIFO. This feature works in conjunction with the special character detection. When an
XOFF condition is detected, the UART transmitter will suspend any further data transmission after the
current character transmission is completed. The transmitter will resume data-transmission as soon as an
XON condition is detected. The automatic in-band feature is enabled by the Enhanced Function Register
(EFR). EFR[1:0] enables the in-band receive flow control, and EFR[3:2] enables the in-band transmit flow
control.
The out-of-band flow control utilizes RTS# and CTS# pins to suspend and resume the data transmission
and to prevent data-overrun. An asserted CTS# pin signals the UART to suspend transmission due to a full
remote receive FIFO. Upon detecting an asserted CTS# pin, the UART will complete the current character
transmission and enters idle mode until the CTS# pin is deasserted.
The UART deasserts RTS# to signal the remote transmitter that the local receive FIFO reaches the
programmed upper trigger level. When the local receive FIFO falls below the programmed lower trigger
level, the RTS# is reasserted. The automatic out-of-band flow control is enabled by EFR[7:6].
Page 21 of 70
September 2009 – Revision 1.3
Pericom Semiconductor
09-0088