PI7C9X7958ANBE Pericom Semiconductor, PI7C9X7958ANBE Datasheet - Page 39

IC PCIE-TO-UART BRIDGE 160LFBGA

PI7C9X7958ANBE

Manufacturer Part Number
PI7C9X7958ANBE
Description
IC PCIE-TO-UART BRIDGE 160LFBGA
Manufacturer
Pericom Semiconductor
Datasheets

Specifications of PI7C9X7958ANBE

Applications
PCIe-to-Uart Bridge
Interface
Advanced Configuration Power Interface (ACPI)
Voltage - Supply
1.8V, 3.3V
Package / Case
160-LFBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Part Number:
PI7C9X7958ANBE
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PI7C9X7958ANBE
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11-0039
6.2.58. NEXT ITEM POINTER REGISTER – OFFSET 100h
6.2.59. UNCORRECTABLE ERROR STATUS REGISTER – OFFSET 104h
6.2.60. UNCORRECTABLE ERROR MASK REGISTER – OFFSET 108h
March 2011 – Revision 1.4
Pericom Semiconductor
BIT
19:16
BIT
31:20
BIT
0
3:1
4
11:5
12
13
14
15
16
17
18
19
20
31:21
BIT
FUNCTION
Capability Version
FUNCTION
Next Capability
Offset
FUNCTION
Training Error
Status
Reserved
Data Link Protocol
Error Status
Reserved
Poisoned TLP
Status
Flow Control
Protocol Error
Status
Completion
Timeout Status
Completer Abort
Status
Unexpected
Completion Status
Receiver Overflow
Status
Malformed TLP
Status
ECRC Error Status
Unsupported
Request Error
Status
Reserved
FUNCTION
RW1CS
RW1CS
RW1CS
RW1CS
RW1CS
RW1CS
RW1CS
RW1CS
RW1CS
RW1CS
RW1CS
TYPE
TYPE
TYPE
TYPE
RO
RO
RO
RO
RO
Page 39 of 71
DESCRIPTION
Indicates PCI-SIG defined PCI Express capability structure version
number.
Reset to 1h.
DESCRIPTION
Read as 00h. No other ECP registers.
Reset to 000h.
DESCRIPTION
DESCRIPTION
When set, indicates that the Training Error event has occurred.
Reset to 0b.
Reset to 000b.
When set, indicates that the Data Link Protocol Error event has
occurred.
Reset to 0b.
Reset to 0000000b.
When set, indicates that a Poisoned TLP has been received or
generated.
Reset to 0b.
When set, indicates that the Flow Control Protocol Error event has
occurred.
Reset to 0b.
When set, indicates that the Completion Timeout event has occurred.
Reset to 0b.
When set, indicates that the Completer Abort event has occurred.
Reset to 0b.
When set, indicates that the Unexpected Completion event has
occurred.
Reset to 0b.
When set, indicates that the Receiver Overflow event has occurred.
Reset to 0b.
When set, indicates that a Malformed TLP has been received.
Reset to 0b.
When set, indicates that an ECRC Error has been detected.
Reset to 0b.
When set, indicates that an Unsupported Request event has occurred.
Reset to 0b.
Reset to 000h.
PCI Express® Octal UART
PI7C9X7958
Datasheet

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