PTN3360DBS,518 NXP Semiconductors, PTN3360DBS,518 Datasheet
PTN3360DBS,518
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PTN3360DBS,518 Summary of contents
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PTN3360D Enhanced performance HDMI/DVI level shifter with active DDC buffer, supporting deep color mode Rev. 2 — 19 November 2010 1. General description The PTN3360D is a high-speed level shifter device which converts four lanes of low-swing AC-coupled differential input ...
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... NXP Semiconductors MULTI-MODE DISPLAY SOURCE PCIe PHY ELECTRICAL TMDS coded data TMDS coded data TMDS coded data TMDS clock pattern DDC I/O (I CONFIGURATION Remark: TMDS clock and data lanes can be assigned arbitrarily and interchangeably to D[4:1]. Fig 1. Typical application system diagram PTN3360D ...
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... NXP Semiconductors 2. Features and benefits 2.1 High-speed TMDS level shifting Converts four lanes of low-swing AC-coupled differential input signals to DVI v1.0 and HDMI v1.3a compliant open-drain current-steering differential output signals TMDS level shifting operation up to 2.5 Gbit/s per lane (250 MHz character clock) ...
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... NXP Semiconductors 4. Ordering information Table 1. Type number PTN3360DBS PTN3360DBS/S900 4.1 Ordering options Table 2. Type number PTN3360DBS PTN3360DBS/S900 PTN3360D Product data sheet HDMI/DVI level shifter supporting deep color mode Ordering information Package Name Description HVQFN48 plastic thermal enhanced very thin quad flat package ...
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... NXP Semiconductors 5. Functional diagram Fig 2. PTN3360D Product data sheet HDMI/DVI level shifter supporting deep color mode OE_N input bias 50 Ω IN_D4+ IN_D4− input bias 50 Ω IN_D3+ IN_D3− input bias 50 Ω IN_D2+ IN_D2− input bias 50 Ω IN_D1+ IN_D1− ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 3. PTN3360D Product data sheet HDMI/DVI level shifter supporting deep color mode terminal 1 index area GND EQ5 3 4 n.c. 5 GND REXT 6 HPD_SOURCE 7 SDA_SOURCE 8 9 SCL_SOURCE 10 n. GND 12 Transparent top view HVQFN48 package supply ground is connected to both GND pins and exposed center pad. ...
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... NXP Semiconductors Fig 4. 6.2 Pin description Table 3. Symbol OE_N, IN_Dx and OUT_Dx signals OE_N IN_D4+ PTN3360D Product data sheet HDMI/DVI level shifter supporting deep color mode terminal 1 index area GND EQ5 n.c. 4 GND 5 n.c. 6 PTN3360DBS/S900 7 HPD_SOURCE 8 SDA_SOURCE SCL_SOURCE 9 n. GND Transparent top view HVQFN48 package supply ground is connected to both GND pins and exposed center pad ...
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... NXP Semiconductors Table 3. Symbol IN_D4− IN_D3+ IN_D3− IN_D2+ IN_D2− IN_D1+ IN_D1− OUT_D4+ OUT_D4− OUT_D3+ OUT_D3− OUT_D2+ PTN3360D Product data sheet HDMI/DVI level shifter supporting deep color mode Pin description …continued Pin Type 47 Self-biasing differential input ...
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... NXP Semiconductors Table 3. Symbol OUT_D2− OUT_D1+ OUT_D1− HPD and DDC signals HPD_SINK HPD_SOURCE 7 SCL_SOURCE 9 SDA_SOURCE 8 SCL_SINK SDA_SINK DDC_EN Supply and ground V DD [1] GND PTN3360D Product data sheet HDMI/DVI level shifter supporting deep color mode Pin description …continued Pin Type ...
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... NXP Semiconductors Table 3. Symbol Feature control signals REXT n.c. n.c. EQ5 [1] HVQFN48 package supply ground is connected to both GND pins and exposed center pad. GND pins and the exposed center pad must be connected to supply ground for proper device operation. For enhanced thermal, electrical, and board level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the board and for proper heat conduction through the board, thermal vias need to be incorporated in the PCB in the thermal pad region ...
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... NXP Semiconductors 7.1 Enable and disable features PTN3360D offers different ways to enable or disable functionality, using the Output Enable (OE_N), and DDC Enable (DDC_EN) inputs. Whenever the PTN3360D is disabled, the device will be in Standby mode and power consumption will be minimal; otherwise the PTN3360D will be in active mode and power consumption will be nominal. ...
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... NXP Semiconductors 7.1.4 Enable/disable truth table Table 4. HPD_SINK, OE_N and DDC_EN enabling truth table Inputs HPD_SINK OE_N DDC_EN [1] [2] LOW LOW LOW LOW LOW HIGH LOW HIGH LOW LOW HIGH HIGH HIGH LOW LOW HIGH LOW HIGH HIGH HIGH LOW HIGH ...
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... NXP Semiconductors 7.2 Analog current reference (PTN3360DBS only) The REXT pin (pin analog current sense port used to provide an accurate current reference for the differential outputs OUT_Dx. For best output voltage swing accuracy, use kΩ resistor (1 % tolerance) connected between this terminal and GND is recommended external 10 kΩ ...
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... NXP Semiconductors PTN3360D has rise time accelerators on the sink-side port (SCL_SINK and SDA_SINK) only. During positive bus transitions on the sink-side port, a current source is switched on to quickly slew the SCL_SINK and SDA_SINK lines HIGH once the 5 V DDC bus V threshold level of around 1 exceeded, and turns off as the 5 V DDC bus V threshold voltage of approximately 3 ...
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... NXP Semiconductors 10. Characteristics 10.1 Differential inputs Table 9. Differential input characteristics for IN_Dx signals Symbol Parameter [1] UI unit interval V differential input peak-to-peak voltage RX_DIFFp-p T receiver eye time RX_EYE V peak common-mode input voltage (AC) i(cm)M(AC input impedance RX_DC V bias receiver voltage RX(bias) Z single-ended input impedance ...
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... NXP Semiconductors Swing down from TMDS termination voltage (3.3 V ± 10 %). [3] [4] This differential skew budget is in addition to the skew presented between IN_D+ and IN_D− paired input pins. [5] This lane-to-lane skew budget is in addition to skew between differential input pairs. [6] Jitter budget for differential signals as they pass through the level shifter. ...
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... NXP Semiconductors 10.5 DDC characteristics Table 13. DDC characteristics Symbol Parameter Input and output SCL_SOURCE and SDA_SOURCE HIGH-level input voltage IH V LOW-level input voltage IL V contention LOW-level input voltage ILc I input leakage current LI I LOW-level input current IL V LOW-level output voltage OL −V ...
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... NXP Semiconductors 11. Package outline HVQFN48: plastic thermal enhanced very thin quad flat package; no leads; 48 terminals; body 0.85 mm terminal 1 index area terminal 1 48 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... NXP Semiconductors 12. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”. 12.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits ...
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... NXP Semiconductors 12.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • ...
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... NXP Semiconductors Fig 6. For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 13. Abbreviations Table 16. Acronym CDM CEC DDC DVI EMI ESD HBM HDMI HPD 2 I C-bus I/O NMOS TMDS VESA PTN3360D Product data sheet HDMI/DVI level shifter supporting deep color mode ...
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... NXP Semiconductors 14. Revision history Table 17. Revision history Document ID Release date PTN3360D v.2 20101119 • Modifications: Section 2.4 • Table 7 “Recommended operating PTN3360D v.1 20100616 PTN3360D Product data sheet HDMI/DVI level shifter supporting deep color mode Data sheet status Product data sheet “ ...
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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...
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... NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...
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... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 3 2.1 High-speed TMDS level shifting . . . . . . . . . . . . 3 2.2 DDC level shifting . . . . . . . . . . . . . . . . . . . . . . . 3 2.3 HPD level shifting . . . . . . . . . . . . . . . . . . . . . . . 3 2.4 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 4 4.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 4 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 5 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 6 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 6.2 Pin description ...