DP83816AVNG/NOPB National Semiconductor, DP83816AVNG/NOPB Datasheet - Page 75

• Manufacturer Part Number: DP83816AVNG/NOPB
• Description: IC MEDIA ACCESS CTRLR 144-LQFP
• Manufacturer: National Semiconductor

Specifications of DP83816AVNG/NOPB

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 144-LQFP
• Mounting Type: Surface Mount
• For Use With: DP83816-MAAP - BOARD EVALUATION DP83816
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *DP83816AVNG; *DP83816AVNG/NOPB; DP83816AVNG

4.0 Register Set
4.3.15 PHY Control Register
15:12
Bit
7:6
4:3
1:0
Bit
6:5
4:0
11
10
8
5
2
9
8
7
FORCE_100_OK Force 100 Mb/s Good Link:
NRZI_BYPASS
BIST_STATUS
PHYADDR[4:0]
BP_STRETCH
BIST_START
PAUSE_STS
SD_OPTION
Bit Name
Bit Name
Reserved
Reserved
Reserved
Reserved
Reserved
PSR_15
Offset: 00E4h
(Continued)
Tag: PHYCR
Reserved
BIST Sequence select: Selects length of LFSR used in BIST
1 = PSR15 selected
0 = PSR9 selected
BIST Test Status: Default: 0, LL/RO
1 = BIST pass
0 = BIST fail. Latched, cleared by write to BIST start bit.
BIST Start: BIST runs continuously until stopped. Minimum time to run should be 1 ms.
1 = BIST start
0 = BIST stop
Bypass LED Stretching:
This will bypass the LED stretching and the LEDs will reflect the internal value.
1 = Bypass LED stretching
0 = Normal operation
Pause Compare Status: Default: 0, RO
0 = Local Device and the Link Partner are not Pause capable
1 = Local Device and the Link Partner are both Pause capable
Reserved
PHY Address: Default: <11111b>, RW
PHY address for the port.
Signal Detect Option:
1 = Enhanced signal detect algorithm
0 = Reduced signal detect algorithm
Reserved: Read as 0
1 = Forces 100 Mb/s Good Link
0 = Normal 100 Mb/s operation
Reserved: Read as 0
NRZI Bypass Enable:
1 = NRZI Bypass Enabled
0 = NRZI Bypass Disabled
Reserved: Read as 0
Access: Read Write
Size: 16 bits
75
Description
Description
Hard Reset: 003Fh
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