NCN6004AFTBR2G ON Semiconductor, NCN6004AFTBR2G Datasheet - Page 17

no-image

NCN6004AFTBR2G

Manufacturer Part Number
NCN6004AFTBR2G
Description
IC INTERFACE SAM/SIM DUAL 48TQFP
Manufacturer
ON Semiconductor
Datasheet

Specifications of NCN6004AFTBR2G

Applications
PC's, PDA's
Interface
Microcontroller
Voltage - Supply
1.8 V ~ 5.5 V
Package / Case
48-TFQFP Exposed Pad
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
NCN6004AFTBR2GOS
NCN6004AFTBR2GOS
NCN6004AFTBR2GOSTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NCN6004AFTBR2G
Manufacturer:
ON
Quantity:
1 944
Part Number:
NCN6004AFTBR2G
Manufacturer:
ON
Quantity:
2 524
Part Number:
NCN6004AFTBR2G
Manufacturer:
ON Semiconductor
Quantity:
10 000
Part Number:
NCN6004AFTBR2G
Manufacturer:
ON/安森美
Quantity:
20 000
PARALLEL/MULITPLEXED OPERATION MODES
select the operation mode of the NCN6004A. Depending
upon the logic level, the device operates either in a parallel
mode (all the card pins, on the mP side, are fully independent)
common logic controls pins (A0, A1, A2, A3, PGM,
PWR_ON, CARD_SEL and CS). On the other hand, the
logic status returned by the interface (STATUS pin 46) is
shared by the two channels and can be read independently
by setting CARD_SEL accordingly.
multiplexed
MUX_MODE state as described here below.
MUX_MODE = Low " PARALLEL MODE
mode. The transfer gate Q4 and the multiplexer circuit are
disconnected and all the data will be carried out through their
respective paths. The switches Q1, Q2 and Q3 are flipped to
the B position, thus providing a direct connection from port
B control signals to CARD_B
and both cards can operate simultaneously, the data
The logic input MUX_MODE, pin 44, provides a way to
In both case, the device is programmed by means of the
The card related signals connected on the mC side are
When pin 44 is low, the device operates in the parallel
All the CARD_A and CARD_B signals are independent
MUX_MODE
CARD_SEL
CLK_IN_A
CLK_IN_B
RESET_A
or
REST_B
C4_A
C8_A
I/O_A
I/O_B
C4_B
C8_B
independent,
10
11
12
9
19
18
17
16
15
15
13
15
Figure 6. Simplified MUX_MODE Logic and Multiplex Circuit
depending
Q4
MULTIPLEXER
A
B
upon the
Q1
CLOCK DIVIDERS
& MULTIPLEXER
http://onsemi.com
NCN6004A
A
B
Q2
17
or in multiplexed mode (all the logic card pins, on the mP
side, share a common bus). Figure 6 shows a simplified
schematic of the multiplex circuit built in the NCN6004A
chip.
transaction can take place at the same time and processed
independently. Of course, the microcontroller must have the
right data bus available to handle this process.
once the system has been started. If such a function is
needed, one must pull down the related NCN6004A power
supply, change the MUX_MODE logic level, and re−start
the interface.
MUX_MODE = High " MULTIPLEXED MODE
mode and all the card signals are shared between CARD_A
and CARD_B, except the input clocks which are
independent at any time. The RST_B, C4_B and C8_B pins
are preferably left open at PCB level. The I/O_B pin must be
left open and cannot be connected to any external signal or
bias voltages.
the CARD_SEL logic level, the I/O data will be transferred
A
B
However, it is not possible to change the operating mode
When pin 44 is High, the device operates in a multiplexed
The transfer gate Q4 is switched ON and, depending upon
Q3
BUFFER
BUFFER
BUFFER
BUFFER
CLK_A
CLK_B
I/O_B
I/O_A
23
22
21
24
37
38
39
40
30
31

Related parts for NCN6004AFTBR2G