NCN6004AFTBR2G ON Semiconductor, NCN6004AFTBR2G Datasheet - Page 18

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NCN6004AFTBR2G

Manufacturer Part Number
NCN6004AFTBR2G
Description
IC INTERFACE SAM/SIM DUAL 48TQFP
Manufacturer
ON Semiconductor
Datasheet

Specifications of NCN6004AFTBR2G

Applications
PC's, PDA's
Interface
Microcontroller
Voltage - Supply
1.8 V ~ 5.5 V
Package / Case
48-TFQFP Exposed Pad
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
NCN6004AFTBR2GOS
NCN6004AFTBR2GOS
NCN6004AFTBR2GOSTR

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to either CARD_A or CARD_B. It is neither possible to
connect directly I/O_A to I/O_B nor to connect the I/O_B
pin to ground or voltage supply.
used to select the card in use for a given transaction. The
switches Q1, Q2 and Q3 and swapped to the A position, thus
providing a path for the control signals applied to the
CARD_A side.
other, the previous logic states of the on going card are
latched in the chip and the related output card pin are
maintained at the appropriate levels. When the system
resumes to the previous card, the latches return to the
transparent operation and the signals presented by the mP
take priority over the previously latched states.
CLK_IN_B) are maintained independent and can be routed
to either CARD_A or CARD_B according to the
programming functions given in Table 2.
POWER DOWN OPERATION
external MPU or by the internal error condition. The
communication
according to the ISO7816−3 sequence. On the other hand,
the MPU can run the Stand By mode by forcing CS = H,
leaving the chip in the previous operating mode.
Force RST to Low
Force CLK to Low, unless it is already in this state
Force C4 and C8 to Low
Force CRD_IO to Low
Shut Off the CRD_VCC Supply
The multiplexer is activated and the CARD_SEL signal is
When the CARD_SEL signal flips from one card to the
On the other hand, the input clocks (CLK_IN_A and
The power down mode can be initiated by either the
session is terminated immediately,
CRD_VCC = 4.75 V
CRD_VCC = 0.40 V
CRD_VCC = 5 V
Figure 7. Card Power Supply Turn ON and Shut
V
Figure 8. Card Power Down Sequence
500 ms Max
Turn ON
OFF Typical Timings
http://onsemi.com
CRD_VCC
CRD_DET
CRD_RST
CRD_CLK
CRD_C4
CRD_C8
NCN6004A
CRD_IO
18
CARD POWER SUPPLY TIMING
CRD_VCC_A or CRD_VCC_B power supply rise time
depends upon the current capability of the DC/DC converter
together with the external inductors L1/L2 and the reservoir
capacitor connected across each card power supply pin and
GROUND.
CRD_VCC_B fall times depend upon the external reservoir
capacitor and the peak current absorbed by the internal
NMOS
CRD_VCC_B and GROUND. These behaviors are depicted
by Figure 7, assuming a 10 mF output capacitor.
the designer must take care of these limits if the t
t
requirement.
operation and will automatically run the Power Down
Sequence of the related card as described by the ISO/CEI
7816−3 sequence depicted in Figure 8 and illustrated by the
oscillogram in Figure 9.
OFF
When the PWR_ON signal is high, the associated
On the other hand, at turn off, the CRD_VCC_A and
Since none of these parameters can have infinite values,
When the card is extracted, the interface will detect the
CARD EXTRACTION DETECTED
provided by the data sheets does not meet his
device
250 ms Max
Shut OFF
Internal Delay
400 ns typ.
built
across
t
each
T
CRD_VCC_A/
ON
or the

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