W83627EG Nuvoton Technology Corporation of America, W83627EG Datasheet - Page 181

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W83627EG

Manufacturer Part Number
W83627EG
Description
IC I/O CONTROLLER 128-QFP
Manufacturer
Nuvoton Technology Corporation of America
Datasheets

Specifications of W83627EG

Applications
PC's, PDA's
Interface
LPC
Voltage - Supply
3.3V
Package / Case
128-XFQFN
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
W83627EG
Manufacturer:
Nuvoton Technology Corporation of America
Quantity:
10 000
Bit 7-5: Read/Write. These bits select the mode.
Bit 4: Read/Write (Valid only in ECP Mode)
000
001
010
011
100
101
110
111
1
0
Standard Parallel Port (SPP) mode. The FIFO is reset in this mode.
PS/2 Parallel Port mode. In addition to the functions of the SPP mode, this mode has
an extra trait: Direction is able to tri-state the data lines. Furthermore, reading the
data register returns the value on the data lines, not the value in the data register.
Parallel Port FIFO mode. This is the same as SPP mode except that bytes are
written or DMAed to the FIFO. FIFO data are automatically transmitted using the
standard parallel port protocol. This mode functions only when direction is 0.
ECP Parallel Port Mode. When the direction is 0 (forward direction), bytes placed
into the ecpDFifo and bytes written to the ecpAFifo are placed in a single FIFO and
automatically transmitted to the peripheral using the ECP Protocol. When the
direction is 1 (reverse direction), bytes are moved from the ECP parallel port and
packed into bytes in the ecpDFifo.
EPP Mode. EPP mode is activated if the EPP mode is selected.
Reserved.
Test Mode. The FIFO may be written and read in this mode, but the data is not
transmitted on the parallel port.
Configuration Mode. The confgA and confgB registers are accessible at 0x400 and
0x401 in this mode.
Disables the interrupt generated on the asserting edge of nFault.
Enables the interrupt generated on the falling edge of nFault. This prevents
interrupts from being lost in the time between the read of the ECR and the write of
the ECR.
7
6
5
W83627EHF/EF, W83627EHG/EG
4
- 170 -
3
2
empty
full
service Intr
dmaEn
nErrIntrEn
MODE
MODE
MODE
1
0

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