M25PX64-VMF6TP Micron Technology Inc, M25PX64-VMF6TP Datasheet - Page 29
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M25PX64-VMF6TP
Manufacturer Part Number
M25PX64-VMF6TP
Description
Manufacturer
Micron Technology Inc
Datasheet
1.M25PX64-VMF6TP.pdf
(70 pages)
Specifications of M25PX64-VMF6TP
Cell Type
NOR
Density
64Mb
Access Time (max)
8ns
Interface Type
Serial (SPI)
Address Bus
24b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
SOIC W
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
8M
Supply Current
12mA
Mounting
Surface Mount
Pin Count
16
Lead Free Status / Rohs Status
Supplier Unconfirmed
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M25PX64-VMF6TP
Manufacturer:
NUMONYX
Quantity:
5 100
Part Number:
M25PX64-VMF6TP
Manufacturer:
ST
Quantity:
20 000
6.2
Write disable (WRDI)
The write disable (WRDI) instruction
The write disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
The write enable latch (WEL) bit is reset under the following conditions:
Figure 10. Write disable (WRDI) instruction sequence
Power-up
Write disable (WRDI) instruction completion
Write status register (WRSR) instruction completion
Write to lock register (WRLR) instruction completion
Page program (PP) instruction completion
Dual input fast program (DIFP) instruction completion
Program OTP (POTP) instruction completion
Subsector erase (SSE) instruction completion
Sector erase (SE) instruction completion
Bulk erase (BE) instruction completion
S
C
DQ0
DQ1
(Figure
High Impedance
0
1
2
Instruction
10) resets the write enable latch (WEL) bit.
3
4
5
6
7
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