MAX5971BETI+ Maxim Integrated Products, MAX5971BETI+ Datasheet - Page 20

• Manufacturer Part Number: MAX5971BETI+
• Description: Hot Swap & Power Distribution IEEE 802.3af/at PSE Controller
• Manufacturer: Maxim Integrated Products

Specifications of MAX5971BETI+

• Lead Free Status / Rohs Status: Details

Single-Port, 40W, IEEE 802.3af/at,
PSE Controller with I
During startup and normal operation, an internal circuit
senses the port voltage and reduces the current-limit
value and the overcurrent threshold when (V
V
power dissipation on the internal MOSFET. The current
limit eventually reduces down to I
when (V
The MAX5971B internally generates digital supplies
(referenced to V
All logic inputs and outputs are referenced to V
See the Electrical Characteristics table for digital input
thresholds. If digital logic inputs are driven externally, the
nominal digital logic level is 3.3V.
The MAX5971B contains an open-drain logic output
(INT) that goes low when an interrupt condition exists.
The interrupt register (R00h, Table 7) contains the inter-
rupt flag bits and the interrupt mask register (R01h,
Table 8) determines which events can trigger an inter-
rupt. When an event occurs, the appropriate interrupt
event register bits (in R02h through R0Bh) and the cor-
responding interrupt (in R00h) are set to 1 and INT is
asserted low (unless masked).
Figure 3. Foldback Current Characteristics
20
OUT
_____________________________________________________________________________________
) < 27V. The foldback function helps to reduce the
AGND
I
TH_FB
I
LIM
I
- V
RSENSE
EE
OUT
) to power the internal logic circuitry.
) < 10V (see Figure 3).
10V
Foldback Current
TH_FB
Digital Logic
(166mA, typ)
Interrupt
AGND
2
EE
C
-
.
27V
As a response to an interrupt, the controller can read
the status of the event register(s) to determine the cause
of the interrupt and take appropriate action. Each inter-
rupt event register is paired with a clear-on-read (CoR)
register. When an interrupt event register is read through
the corresponding CoR register, the interrupt register
is reset to 0. INT remains low and the interrupt is not
reset when the interrupt event register is read through
the read-only addresses. For example, to clear a sup-
ply event fault, read R0Bh (CoR) not R0Ah (read only,
see Table 12). Use the CLR_INT bit (R1Ah[7]) to clear
an interrupt, or the RESET_IC (R1Ah[4]) or RESET_P
(R1Ah[0]) bit to initiate a software reset (see Table 27).
The MAX5971B contains both undervoltage and over-
voltage protection features. Table 12 in the Register
Map and Description section shows a detailed list of
the undervoltage and overvoltage protection features.
An internal V
cuit keeps the port off and the MAX5971B in reset until
V
An internal V
the port when V
MAX5971B also features a V
(V
AGND
EE_UV
Undervoltage and Overvoltage Protection
- V
) that triggers when V
EE
EE
EE
exceeds 28.5V (typ) for more than 2.5ms.
overvoltage (V
AGND
undervoltage lockout (V
- V
EE
exceeds 62.5V (typ). The
EE
EE_OV
AGND
undervoltage interrupt
V
) circuit shuts down
AGND
- V
- V
EE
OUT
EE_UVLO
drops below
) cir-