L80227-LEADFREE LSI, L80227-LEADFREE Datasheet - Page 83

• Manufacturer Part Number: L80227-LEADFREE
• Manufacturer: LSI

Specifications of L80227-LEADFREE

• Lead Free Status / Rohs Status: Compliant

5.1 Signal Description
Chapter 5
Management Interface
This chapter describes the Management Interface, over which the
internal device registers are accessed. It contains the following sections:
The Management Interface, referred to as the MI serial port, is a 7-pin
bidirectional link through which the internal device registers are
accessed. The internal register bits control the configuration and
capabilities of the device, and reflect device status.
The MI serial port provides access to eight internal registers and meets
all IEEE 802.3 specifications for the Management Interface.
The MI serial port has six pins:
The MDA[3:0]n pins configure the device for a particular address, from
0b0000 to 0b1111, such that 16 devices can exist in the same address
domain and each can be addressed separately over the MI serial port.
When an MI read or write cycle occurs, the device compares the
internally inverted and latched state of the MDA[4:0]n pins to the
L80227 10BASE-T/100BASE-TX Ethernet PHY Technical Manual
Section 5.1, “Signal Description”
Section 5.2, “General Operation”
Section 5.3, “Frame Structure”
Section 5.4, “Register Structure”
MDC – serial shift clock input pin
MDIO – bidirectional data pin
MDA[3:0]n – physical address pins
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