LFX200EB-03FN256C Lattice, LFX200EB-03FN256C Datasheet - Page 49

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LFX200EB-03FN256C

Manufacturer Part Number
LFX200EB-03FN256C
Description
IC FPGA 200K GATES 256-BGA
Manufacturer
Lattice
Datasheet

Specifications of LFX200EB-03FN256C

Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Lattice Semiconductor
ispXPGA 1200B/C & ispXPGA 1200EB/EC External Switching
Characteristics
Parameter
t
t
t
t
t
t
t
t
t
t
1. Only available for ispXPGA 1200B and ispXPGA 1200EB (2.5V/3.3V) devices.
CO
S
H
SINDLY
HINDLY
COPLL
SPLL
HPLL
SINDLYPLL
HINDLYPLL
Global Clock Input to Out-
put
Global Clock Input Setup
Global Clock Input Hold
Global Clock Input Setup
Global Clock Input Hold
Global Clock Input to
Output
Global Clock Input Setup
Global Clock Input Hold
Global Clock Input Setup
Global Clock Input Hold
Description
Over Recommended Operating Conditions
PIO Output Register
PIO Input Register without input
delay
PIO Input Register without input
delay
PIO Input Register with input delay
PIO Input Register with input delay
PIO Output Register using PLL
without delay
PIO Input Register without input
delay using PLL without delay
PIO Input Register without input
delay using PLL without delay
PIO Input Register with input delay
using PLL without delay
PIO Input Register with input delay
using PLL without delay
Conditions
45
Min.
-2.7
-4.1
4.5
3.8
0.0
0.5
0.8
7.6
-5
1
Max.
6.6
3.1
ispXPGA Family Data Sheet
Min.
-2.7
-4.0
4.6
3.8
0.0
0.5
0.8
7.6
-4
Max.
7.1
3.3
Min.
-2.3
-3.4
5.3
4.4
0.0
0.6
1.0
8.8
-3
Max.
8.2
3.8
Timing v.0.2
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns

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