LFE3-150EA-8FN672C Lattice, LFE3-150EA-8FN672C Datasheet - Page 122
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LFE3-150EA-8FN672C
Manufacturer Part Number
LFE3-150EA-8FN672C
Description
IC FPGA 149KLUTS 380I/O 672-BGA
Manufacturer
Lattice
Datasheet
1.LFE3-150EA-7FN672C.pdf
(136 pages)
Specifications of LFE3-150EA-8FN672C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Lattice Semiconductor Corporation
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Lattice Semiconductor
Pin Information Summary (Cont.)
Emulated Differential
I/O per Bank
High-Speed Differential I/
O per Bank
Total Single-Ended/
Total Differential I/O
per Bank
DDR Groups Bonded
per Bank
SERDES Quads
1. Some DQS groups may not support DQS-12. Refer to the device pinout (.csv) file.
1
Pin Information Summary
Pin Type
Bank 0
Bank 1
Bank 2
Bank 3
Bank 6
Bank 7
Bank 8
Bank 0
Bank 1
Bank 2
Bank 3
Bank 6
Bank 7
Bank 8
Bank 0
Bank 1
Bank 2
Bank 3
Bank 6
Bank 7
Bank 8
Bank 0
Bank 1
Bank 2
Bank 3
Bank 6
Bank 7
Configuration Bank 8
484 fpBGA
42/21
36/18
28/14
58/29
67/33
40/20
24/12
4-7
21
18
20
22
11
12
11
8
0
0
6
9
9
0
3
3
2
3
4
3
0
1
LatticeECP3 Family Data Sheet
ECP3-70EA
672 fpBGA
60/30
48/24
42/21
71/35
78/39
56/28
24/12
30
24
12
23
25
16
12
12
14
12
0
0
9
0
5
4
3
4
4
4
0
2
Pinout Information
1156 fpBGA
86/43
78/39
44/22
98/49
98/49
62/31
24/12
43
39
13
33
33
18
12
16
16
13
0
0
9
0
7
7
3
5
5
4
0
3
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