MT48H8M16LFB4-75 IT:KTR Micron Technology Inc, MT48H8M16LFB4-75 IT:KTR Datasheet - Page 59

MT48H8M16LFB4-75 IT:KTR

Manufacturer Part Number
MT48H8M16LFB4-75 IT:KTR
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT48H8M16LFB4-75 IT:KTR

Lead Free Status / Rohs Status
Compliant
Figure 30: WRITE-to-PRECHARGE
PDF: 09005aef832ff1ea
128mb_mobile_sdram_y35M.pdf - Rev. G 10/09 EN
Note:
Fixed-length WRITE bursts can be truncated with the BURST TERMINATE command.
When truncating a WRITE burst, the input data applied coincident with the BURST TER-
MINATE command is ignored. The last data written (provided that DQM is LOW at that
time) will be the input data applied one clock previous to the BURST TERMINATE com-
mand. This is shown in Figure 31 (page 60), where data n is the last desired data
element of a longer burst.
t
t
Command
Command
WR @
WR @
1. In this example DQM could remain LOW if the WRITE burst is a fixed length of two.
Address
Address
DQM
DQM
CLK
t
t
DQ
DQ
CK
CK < 15ns
15ns
WRITE
Bank a,
WRITE
Bank a,
Col n
D
Col n
D
T0
IN
IN
128Mb: 8 Meg x 16, 4 Meg x 32 Mobile SDRAM
NOP
NOP
D
D
T1
IN
IN
t
WR
59
PRECHARGE
(a or all)
Bank
NOP
T2
t
WR
Micron Technology, Inc. reserves the right to change products or specifications without notice.
PRECHARGE
(a or all)
Bank
T3
NOP
t RP
NOP
NOP
T4
t RP
ACTIVE
Bank a,
NOP
Row
T5
©2008 Micron Technology, Inc. All rights reserved.
WRITE Operation
Bank a,
Don’t Care
ACTIVE
NOP
Row
T6

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