MC68HC705C8ACB Freescale Semiconductor, MC68HC705C8ACB Datasheet - Page 131

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MC68HC705C8ACB

Manufacturer Part Number
MC68HC705C8ACB
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC705C8ACB

Cpu Family
HC05
Device Core Size
8b
Frequency (max)
2.1MHz
Interface Type
SCI/SPI
Program Memory Type
EPROM
Program Memory Size
8KB
Total Internal Ram Size
304Byte
# I/os (max)
24
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
42
Package Type
SPDIP
Lead Free Status / Rohs Status
Not Compliant
10.6.3 SCI Control Register 2
MC68HC705C8A — Rev. 3
MOTOROLA
Address:
WAKE — Wakeup Bit
SCI control register 2 (SCCR2) shown in
functions:
TIE — Transmit Interrupt Enable Bit
Reset:
Read:
Write:
This read/write bit determines which condition wakes up the SCI: a
logic 1 (address mark) in the most significant bit position of a received
character or an idle condition of the PD0/RDI pin. Reset has no effect
on the WAKE bit.
This read/write bit enables SCI interrupt requests when the TDRE bit
becomes set. Reset clears the TIE bit.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Address mark wakeup
0 = Idle line wakeup
1 = TDRE interrupt requests enabled
0 = TDRE interrupt requests disabled
Enables the SCI receiver and SCI receiver interrupts
Enables the SCI transmitter and SCI transmitter interrupts
Enables SCI receiver idle interrupts
Enables SCI transmission complete interrupts
Enables SCI wakeup
Transmits SCI break characters
Serial Communications Interface (SCI)
$000F
Bit 7
TIE
0
Figure 10-7. SCI Control Register 2 (SCCR2)
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TCIE
6
0
RIE
5
0
ILIE
4
0
Serial Communications Interface (SCI)
Figure 10-7
TE
3
0
RE
2
0
has these
SCI I/O Registers
RWU
1
0
Technical Data
Bit 0
SBK
0

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