MC68HC705C8ACB Freescale Semiconductor, MC68HC705C8ACB Datasheet - Page 16

• Manufacturer Part Number: MC68HC705C8ACB
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC705C8ACB

• Cpu Family: HC05
• Device Core Size: 8b
• Frequency (max): 2.1MHz
• Interface Type: SCI/SPI
• Program Memory Type: EPROM
• Program Memory Size: 8KB
• Total Internal Ram Size: 304Byte
• # I/os (max): 24
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 42
• Package Type: SPDIP
• Lead Free Status / Rohs Status: Not Compliant

List of Figures
Technical Data
16
Figure
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Freescale Semiconductor, Inc.
For More Information On This Product,
Programmable COP Watchdog Diagram . . . . . . . . . . . . . . .63
Programmable COP Reset Register (COPRST) . . . . . . . . . 64
Programmable COP Control Register (COPCR) . . . . . . . . . 64
Non-Programmable COP Watchdog Diagram . . . . . . . . . . . 67
Stop/Wait Mode Function Flowchart . . . . . . . . . . . . . . . . . . 70
Programmable COP Watchdog
Non-Programmable COP Watchdog
Port A Data Register (PORTA). . . . . . . . . . . . . . . . . . . . . . . 78
Data Direction Register A (DDRA) . . . . . . . . . . . . . . . . . . . .79
Port A I/O Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Port B Data Register (PORTB). . . . . . . . . . . . . . . . . . . . . . . 81
Data Direction Register B (DDRB) . . . . . . . . . . . . . . . . . . . .82
Port B I/O Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Port C Data Register (PORTC) . . . . . . . . . . . . . . . . . . . . . . 85
Data Direction Register C (DDRC) . . . . . . . . . . . . . . . . . . . .86
Port C I/O Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Port D Fixed Input Register (PORTD) . . . . . . . . . . . . . . . . . 88
Timer Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Timer I/O Register Summary . . . . . . . . . . . . . . . . . . . . . . . .91
Input Capture Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Output Compare Operation . . . . . . . . . . . . . . . . . . . . . . . . . 93
Timer Control Register (TCR) . . . . . . . . . . . . . . . . . . . . . . . 94
Timer Status Register (TSR) . . . . . . . . . . . . . . . . . . . . . . . .96
Timer Registers (TRH and TRL) . . . . . . . . . . . . . . . . . . . . . 97
Timer Register Reads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Alternate Timer Register Reads . . . . . . . . . . . . . . . . . . . . . . 99
Alternate Timer Registers (ATRH and ATRL) . . . . . . . . . . . 99
Input Capture Registers (ICRH and ICRL) . . . . . . . . . . . . . 100
Output Compare Registers (OCRH and OCRL). . . . . . . . .101
EPROM/OTPROM Programming Flowchart . . . . . . . . . . . 105
PROM Programming Circuit . . . . . . . . . . . . . . . . . . . . . . . . 106
Go to: www.freescale.com
in Stop Mode (PCOPE = 1) Flowchart. . . . . . . . . . . . . . .72
in Stop Mode (NCOPE = 1) Flowchart . . . . . . . . . . . . . . 74
List of Figures
Title
MC68HC705C8A — Rev. 3
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