S29GL032M10TAIR10 AMD (ADVANCED MICRO DEVICES), S29GL032M10TAIR10 Datasheet - Page 25

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S29GL032M10TAIR10

Manufacturer Part Number
S29GL032M10TAIR10
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of S29GL032M10TAIR10

Lead Free Status / Rohs Status
Not Compliant
Page Mode Read
Writing Commands/Command Sequences
February 7, 2007 S29GL-M_00_B8
The internal state machine is set for reading array data upon device power-up, or after a hardware
reset. This ensures that no spurious alteration of the memory content occurs during the power
transition. No command is necessary in this mode to obtain array data. Standard microprocessor
read cycles that assert valid addresses on the device address inputs produce valid data on the
device data outputs. The device remains enabled for read access until the command register con-
tents are altered.
See
the timing diagram. See
data.
The device is capable of fast page mode read and is compatible with the page mode Mask ROM
read operation. This mode provides faster read access speed for random locations within a page.
The page size of the device is 4 words/8 bytes. The appropriate page is selected by the higher
address bits A(max)–A2. Address bits A1–A0 in word mode (A1–A-1 in byte mode) determine the
specific word within a page. This is an asynchronous operation; the microprocessor supplies the
specific word location.
The random or initial page access is equal to t
long as the locations specified by the microprocessor falls within that page) is equivalent to t
When CE# is deasserted and reasserted for a subsequent access, the access time is t
Fast page mode accesses are obtained by keeping the “read-page addresses” constant and
changing the “intra-read page” addresses.
To write a command or command sequence (which includes programming data to the device and
erasing sectors of memory), the system must drive WE# and CE# to V
The device features an Unlock Bypass mode to facilitate faster programming. Once the device
enters the Unlock Bypass mode, only two write cycles are required to program a word, instead of
four.
using both standard and Unlock Bypass command sequences.
An erase operation can erase one sector, multiple sectors, or the entire device.
Table 16
See
contains timing specification tables and timing diagrams for write operations.
Write Buffer
Write Buffer Programming allows the system write to a maximum of 16 words/32 bytes in one
programming operation. This results in faster effective programming time than the standard pro-
gramming algorithms. See
Accelerated Program Operation
The device offers accelerated program operations through the ACC function. This is one of two
functions provided by the WP#/ACC or ACC pin, depending on model number. This function is pri-
marily intended to allow faster manufacturing throughput at the factory.
If the system asserts V
Bypass mode, temporarily unprotects any protected sector groups, and uses the higher voltage
on the pin to reduce the time required for program operations. The system would use a two-cycle
program command sequence as required by the Unlock Bypass mode. Removing V
WP#/ACC or ACC pin, depending on model number, returns the device to normal operation. Note
that the WP#/ACC or ACC pin must not be at V
ming, or device damage may result. WP# has an internal pullup; when unconnected, WP# is at
V
Autoselect Functions
If the system writes the autoselect command sequence, the device enters the autoselect mode.
The system can then read autoselect codes from the internal register (which is separate from the
memory array) on DQ7–DQ0. Standard read cycle timings apply in this mode. See
Mode
IH
.
Reading Array Data
DC Characteristics
Word Program Command Sequence
and
indicates the address space that each sector occupies.
Autoselect Command Sequence
D a t a
HH
for the active current specification for the write mode.
for more information. See
S29GL-M MirrorBit
DC Characteristics
on this pin, the device automatically enters the aforementioned Unlock
Write Buffer Programming
S h e e t
contains details on programming data to the device
TM
for more information.
for the active current specification on reading array
Flash Family
ACC
HH
for operations other than accelerated program-
AC Characteristics
or t
CE
for more information.
and subsequent page read accesses (as
for timing specifications and
IL
, and OE# to V
AC Characteristics
Table 6
HH
Autoselect
ACC
from the
and
IH
or t
.
PACC
CE
23
.
.

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