M24256-AWMN6T STMicroelectronics, M24256-AWMN6T Datasheet - Page 8

• Manufacturer Part Number: M24256-AWMN6T
• Manufacturer: STMicroelectronics

Specifications of M24256-AWMN6T

• Density: 256Kb
• Interface Type: Serial (I2C)
• Organization: 32Kx8
• Access Time (max): 900ns
• Frequency (max): 400KHz
• Write Protection: Yes
• Data Retention: 40Year
• Operating Supply Voltage (typ): 3.3/5V
• Package Type: SOIC N
• Operating Temp Range: -40C to 85C
• Supply Current: 1mA
• Operating Supply Voltage (min): 2.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / Rohs Status: Not Compliant

M24256-A
Figure 7. Write Cycle Polling Flowchart using ACK
Current Address Read
The device has an internal address counter which
is incremented each time a byte is read. For the
Current Address Read mode, following a START
condition, the master sends a Device Select Code
with the RW bit set to ‘1’. The memory acknowl-
edges this, and outputs the byte addressed by the
internal address counter. The counter is then in-
cremented. The master terminates the transfer
with a STOP condition, as shown in Figure 8, with-
out acknowledging the byte output.
Sequential Read
This mode can be initiated with either a Current
Address Read or a Random Address Read. The
master does acknowledge the data byte output in
this case, and the memory continues to output the
next byte in sequence. To terminate the stream of
bytes, the master must not acknowledge the last
byte output, and must generate a STOP condition.
8/20
First byte of instruction
with RW = 0 already
decoded by the device
ReSTART
STOP
NO
NO
DEVICE SELECT
START Condition
WRITE Cycle
Addressing the
in Progress
with RW = 0
Operation is
Returned
Memory
ACK
Next
YES
WRITE Operation
WRITE Operation
DATA for the
Continue the
YES
NO
The output data comes from consecutive address-
es, with the internal address counter automatically
incremented after each byte output. After the last
memory address, the address counter ‘rolls-over’
and the memory continues to output data from
memory address 00h.
Acknowledge in Read Mode
In all read modes, the memory waits, after each
byte read, for an acknowledgment during the 9
bit time. If the master does not pull the SDA line
low during this time, the memory terminates the
data transfer and switches to its stand-by state.
and Receive ACK
Send Address
Condition
START
Random READ Operation
DEVICE SELECT
Continue the
with RW = 1
YES
AI01847C
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