N28F001BXT150 Intel, N28F001BXT150 Datasheet - Page 10

• Manufacturer Part Number: N28F001BXT150
• Manufacturer: Intel

Specifications of N28F001BXT150

• Density: 1Mb
• Access Time (max): 150ns
• Interface Type: Parallel
• Boot Type: Top
• Address Bus: 17b
• Operating Supply Voltage (typ): 5V
• Operating Temp Range: 0C to 70C
• Package Type: PLCC
• Program/erase Volt (typ): 11.4 to 12.6V
• Sync/async: Asynchronous
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Word Size: 8b
• Number Of Words: 128K
• Supply Current: 30mA
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / Rohs Status: Not Compliant

28F001BX
2.0 PRINCIPLES OF OPERATION
The 28F001BX introduces on-chip write automation
to manage write and erase functions. The write
state machine allows for 100% TTL-level control
inputs, fixed power supplies during erasure and
programming, minimal processor overhead with
RAM-like write timings, and maximum EPROM
compatiblity.
After initial device power-up, or after return from
deep power-down mode (see Bus Operation ), the
28F001BX functions as a read-only memory.
Manipulation of external memory-control pins yield
standard EPROM read, standby, output disable or
intelligent identifier operations. Both status register
and intelligent identifiers can be accessed through
the command register when V
10
Figure 4. 28F001BX-T in a 80C188 System
PP
= V
PPL
.
29040605
This same subset of operations is also available
when high voltage is applied to the V
addition, high voltage on V
erasure and programming of the device. All
functions
contents—program, erase, status, and inteligent
identifier—are accessed via the command register
and verified through the status register.
Commands
microprocessor write timings. Register contents
serve as input to the WSM, which controls the
erase and programming circuitry. Write cycles also
internally latch addresses and data needed for
programming
appropriate command written to the register,
standard microprocessor read timings output array
data, access the intelligent identifier codes, or
output program and erase status for verification.
Figure 5. 28F001BX-B in a 80C51 System
associated
are
or
erase
written
with
operations.
PP
enables successful
altering
using
PP
With
standard
memory
pin. In
29040606
the