ACS8510 Semtech, ACS8510 Datasheet - Page 21

• Manufacturer Part Number: ACS8510
• Manufacturer: Semtech

Specifications of ACS8510

• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6/5.5V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Package Type: LQFP
• Mounting: Surface Mount
• Pin Count: 100
• Lead Free Status / Rohs Status: Not Compliant

Phase Build Out
Phase Build Out
Microprocessor Interface
Microprocessor Interface
Phase Build Out
Phase Build Out
Phase Build Out
Phase Build Out (PBO) is the function to minimise
phase transients on the output SEC clock during
input reference switching. If the currently
selected input reference clock source is lost
(due to a short interruption, out of frequency
detection, or complete loss of reference), the
second, next highest priority reference source
will be selected. During this transition, the
Lost_Phase mode is entered.
The typical phase disturbance on clock
reference source switching will be less than
12 ns on the ACS8510. For clock reference
switching caused by the main input failing or
being disconnected, then the phase disturbance
on the output will still be less than the 120 ns
allowed for in the G.813 spec. The actual value
is dependent on the frequency being locked to.
ITU-T G.813 states that the max allowable short
term phase transient response, resulting from
a switch from one clock source to another,
with Holdover mode entered in between, should
be a maximum
interval. The maximum phase transient or jump
should be less than 120 ns at a rate of change
of less than 7.5 ppm and the Holdover
performance should be better than 0.05 ppm.
On the ACS8510, PBO can be enabled, disabled
or frozen using the µP interface. By default, it
is enabled. When PBO is enabled, it can also
be frozen, which will disable the PBO operation
on the next input reference switch, but will
remain with the current offset. If PBO is disabled
while the device is in the Locked mode, there
will be a phase jump on the output SEC clocks
as the DPLL locks back to 0 degree phase
error.
Microprocessor Interface
Microprocessor Interface
Microprocessor Interface
The ACS8510 incorporates a microprocessor
interface, which can be configured for the
following modes via the bus interface mode
control pins UPSEL(2:0) as defined in Table 10.
Revision 2.00/September 2003
ADVANCED COMMUNICATIONS
of 1 µs over a 15 second
Semtech Corp.
21
Table 10.
Table 10.
Table 10.
Table 10.
Table 10.
Mode Selection
Mode Selection
Mode Selection
Mode Selection
Mode Selection
Motorola Mode
Motorola Mode
Motorola Mode
Motorola Mode
Motorola Mode
Parallel data + address: this mode is suitable
for use with Motorola's 68x0 type bus.
Intel Mode
Intel Mode
Intel Mode
Intel Mode
Intel Mode
Parallel data + address: this mode is suitable
for use with Intel's 80x86 type bus.
Multiplexed Mode
Multiplexed Mode
Multiplexed Mode
Multiplexed Mode
Multiplexed Mode
Data/address: this mode is suitable for use
with microprocessors which share bus signals
between address and data (e.g., Intel's 80x86
family).
Serial Mode
Serial Mode
Serial Mode
Serial Mode
Serial Mode
This mode is suitable for use with micro-
processor which use a serial interface.
EPROM Mode
EPROM Mode
EPROM Mode
EPROM Mode
EPROM Mode
This mode is suitable for simple standalone
applications where it is required to change the
default loading of the register values to suit
different applications.
This can be done by loading values from an
external ROM. The data is read from the ROM
automatically after power up when the
UPSEL(2:0) pins are set to ‘001’. Each register
value is stored sequentially, with ROM address
0 corresponding to register address 0 and so
on.
The value in the ‘chip_id’ location (address 00
& 01) is checked to see if it matches the ID
number of the ACS8510 V2 (value 213E). Upon
a successful number match, the remaining data
UPSEL(2:0)
UPSEL(2:0)
UPSEL(2:0)
111 (7)
UPSEL(2:0)
UPSEL(2:0)
110 (6)
101 (5)
100 (4)
011 (3)
010 (2)
001 (1)
000 (0)
ACS8510 Rev2.1 SETS
M o d e
M o d e
M o d e
OFF
OFF
SERIAL
MOTOROLA
INTEL
MULTIPLEXED
EPROM
OFF
M o d e
M o d e
Microprocessor Interface
Microprocessor Interface
Microprocessor Interface
Microprocessor Interface
Microprocessor Interface
D e s c r i p t i o n
D e s c r i p t i o n
D e s c r i p t i o n
D e s c r i p t i o n
D e s c r i p t i o n
Interface disabled
Interface disabled
Serial uP bus interface
Motorola interface
Intel compatible bus interface
Multiplexed bus interface
EPROM read mode
Interface disabled
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