ACS8510 Semtech, ACS8510 Datasheet - Page 39

• Manufacturer Part Number: ACS8510
• Manufacturer: Semtech

Specifications of ACS8510

• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6/5.5V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Package Type: LQFP
• Mounting: Surface Mount
• Pin Count: 100
• Lead Free Status / Rohs Status: Not Compliant

monitored by the AMI-decoder blocks. Loss of
signal is declared by the decoders when either
the signal amplitude falls below +0.3 V or there
is no activity for 1 ms.
Any reference source which suffers a loss-of-
signal, loss-of-activity, loss-of-regularity or clock-
out-of-band condition will be declared as
unavailable.
Clock quality monitoring is a continuous process
which is used to identify clock problems. There
is a difference in dynamics between the
selected clock and the other reference clocks.
Anomalies occurring on non-selected reference
sources affect only that source's suitability for
selection, whereas anomalies occurring on the
selected clock could have a detrimental impact
on the accuracy of the output clock.
Anomalies, whether affecting signal purity or
signal frequency, could induce jitter or frequency
offsets in the output clock, leading to
anomalous behaviour. Anomalies on the
selected clock, therefore, have to be detected
Revision 2.00/September 2003
ADVANCED COMMUNICATIONS
The time taken to raise an inactivity alarm on a reference source that has previously been fully active (leaky
bucket empty) will be:
where N is the number of the relevent leaky bucket configuration. If an input is intermittently inactive then
this time can be longer. The default setting of cnfg_activ_upper_threshold is 6, therefore the default time is
0.75 s.
The time taken to cancel the activity alarm on a previously completely inactive reference source is calculated
as:
where N is the number of the relevent leaky bucket configuration in each case. The default setting are shown
in the following:
Leaky bucket timing
Leaky bucket timing
Leaky bucket timing
Leaky bucket timing
Leaky bucket timing
2
(cnfg_decay_rate N)
(cnfg_activ_upper_threshold N)
Semtech Corp.
8
2
1
x ((cnfg_bucket_size N) - (cnfg_activ_lower_thrshold N))
x (8-4)
8
8
39
as they occur and the phase locked loop must
be temporarily isolated until the clock is once
again pure. The clock monitoring process cannot
be used for this because the high degree of
accuracy required dictates that the process be
slow. To achieve the immediacy required by the
phase locked loop requires an alternative
mechanism. The phase locked loop itself
contains appropriate circuitry, based around the
phase detector, and isolates itself from the
selected reference source as soon as a signal
impurity is detected. It can likewise respond to
frequency offsets outside the permitted range
since these result in saturation of the phase
detector. When the phase locked loop is isolated
from the reference source, it is essentially
operating in a Holdover state; this is preferable
to feeding the loop with a standby source, either
temporarily or permanently, since excessive
phase excursions on the output clock are
avoided.
Anomalies detected by the phase detector are
integrated in a leaky bucket accumulator.
= 1.0 s
ACS8510 Rev2.1 SETS
secs
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FINAL
secs