DA82562EM Intel, DA82562EM Datasheet - Page 19

• Manufacturer Part Number: DA82562EM
• Manufacturer: Intel

Specifications of DA82562EM

• Lead Free Status / Rohs Status: Not Compliant

PCI Interface
4.1
Intel 8255x 10/100 Mbps Ethernet Controller Family Open Source Software Developer Manual
Table 1.
PCI Configuration Space
One of the most important functions for enabling superior configurability and ease of use is the
ability to relocate PCI devices in the address spaces. By default PCI devices support “Plug and
Play.” When the system is powered on, device independent software (usually the system BIOS)
determines present devices, builds an address map, and assigns non-conflicting resources to those
devices. The device independent software accomplishes this configuration task by writing to the
PCI configuration space of each individual PCI device.
The 8255x supports 16 Dwords of Type 0 Configuration Space Header, as defined in the PCI
Specification, Revision 2.1. The 82259 and 82558 also support a small section in the device
specific configuration space. The configuration space is depicted below. The registers that are not
identical between the devices are shaded.
PCI Configuration Space
(hexadecimal)
Byte Offset
DC
1C
2C
3C
E0
10
14
18
20
24
28
30
34
38
C
0
4
8
Device ID
Status Register
Class Code (200000h)
BIST
CSR Memory Mapped Base Address Register
CSR I/O Mapped Base Address Register
Flash Memory Mapped Base Address Register
Reserved
Subsystem ID
Expansion ROM Base Address Register
Reserved
Reserved
Max_Latency (FFh)
Power Management Capabilities
Reserved
Byte 3
Header Type
Min_Grant (FFh)
Data
Byte 2
Vendor ID
Command Register
Latency Timer
Subsystem Vendor ID
Interrupt Pin (01h)
Next Item Pointer
Power Management CSR
Byte 1
Revision ID
Cache Line Size
Cap_Ptr
Interrupt Line
Capability ID
Byte 0
4
11