TE28F400B3B90 Intel, TE28F400B3B90 Datasheet - Page 8

• Manufacturer Part Number: TE28F400B3B90
• Manufacturer: Intel

Specifications of TE28F400B3B90

• Cell Type: NOR
• Density: 4Mb
• Access Time (max): 90ns
• Interface Type: Parallel
• Boot Type: Bottom
• Address Bus: 18b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 16b
• Number Of Words: 256K
• Supply Current: 18mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

28F004/400B3, 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
1.1
2
Product Overview
Intel provides the most flexible voltage solution in the flash industry, providing three discrete
voltage supply pins: V
Erase operation. All 3-Volt Advanced Boot Block Flash Memory products provide program/erase
capability at 2.7 V or 12 V (for fast production programming), and read with V
many designs read from the flash memory a large percentage of the time, 2.7 V V
provide substantial power savings.
The 3-Volt Advanced Boot Block Flash Memory products are available in either x8 or x16
packages in the following densities: (see
availability.)
The parameter blocks are located at either the top (denoted by -T suffix) or the bottom (-B suffix)
of the address map in order to accommodate different microprocessor protocols for kernel code
location. The upper two (or lower two) parameter blocks can be locked to provide complete code
security for system initialization code. Locking and unlocking is controlled by WP# (see
3.3, “Block Locking” on page 17
The Command User Interface (CUI) serves as the interface between the microprocessor or
microcontroller and the internal operation of the flash memory. The internal Write State Machine
(WSM) automatically executes the algorithms and timings necessary for Program and Erase
operations, including verification, thereby unburdening the microprocessor or microcontroller. The
status register indicates the status of the WSM by signifying block erase or word program
completion and status.
The 3-Volt Advanced Boot Block flash memory is also designed with an Automatic Power Savings
(APS) feature, which minimizes system current drain and allows for very low power designs. This
mode is entered following the completion of a read cycle (approximately 300 ns later).
The RP# pin provides additional protection against unwanted command writes that may occur
during system reset and power-up/down sequences due to invalid system bus conditions (see
Section 3.6, “Power-Up/Down Operation” on page
Section 3.0, “Principles of Operation” on page 10
of operation.
specifications. Refer to
program, and erase performance specifications.
•
•
•
•
•
4-Mbit (4, 194, 304-bit) flash memory organized as 256 Kwords of 16 bits each or 512 Kbytes
of 8-bits each
8-Mbit (8, 388, 608-bit) flash memory organized as 512 Kwords of 16 bits each or 1024
Kbytes of 8-bits each
16-Mbit (16, 777, 216-bit) flash memory organized as 1024 Kwords of 16 bits each or
2048 Kbytes of 8-bits each
32-Mbit (33, 554, 432-bit) flash memory organized as 2048 Kwords of 16 bits each
64-Mbit (67, 108, 864-bit) flash memory organized as 4096 Kwords of 16 bits each
Section 4.4, “DC Characteristics” on page 23
CC
Section 4.5, “AC Characteristics —Read Operations” on page 26
for Read operation, V
for details).
Section 6.0, “Ordering Information” on page 38
CCQ
gives detailed explanation of the different modes
19).
for output swing, and V
provides complete current and voltage
PP
for Program and
CC
CC
at 2.7 V. Since
operation can
Preliminary
Section
for read,
for