TE28F008xxx Intel Corporation, TE28F008xxx Datasheet
TE28F008xxx
Related parts for TE28F008xxx
TE28F008xxx Summary of contents
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... The 3 Volt Advanced Boot Block flash memory, manufactured on Intel’s latest 0.18 m technology, represents a feature-rich solution at overall lower system cost. The 3 Volt Advanced Boot Block flash memory products in x16 will be available in 48-lead TSOP and 48-ball CSP packages. The x8 option of this product family will only be available in 40-lead TSOP and 48- ball µ ...
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... Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800- 548-4725 or by visiting Intel's website at http://www.intel.com. Copyright © Intel Corporation 1999– 2000. *Other brands and names are the property of their respective owners. ...
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Contents 1.0 Introduction .................................................................................................................. 1 1.1 Product Overview .................................................................................................. 2 2.0 Product Description 2.1 Package Pinouts ................................................................................................... 3 2.2 Block Organization ................................................................................................ 7 2.2.1 Parameter Blocks ..................................................................................... 7 2.2.2 Main Blocks .............................................................................................. 7 3.0 Principles of Operation 3.1 Bus Operation ...
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... Reset Operations 6.0 Ordering Information 7.0 Additional Information Appendix A Write State Machine Current/Next States Appendix B Architecture Block Diagram Appendix C Word-Wide Memory Map Diagrams Appendix D Byte-Wide Memory Map Diagrams Appendix E Program and Erase Flowcharts iv ..................................................................................................... 33 .............................................................................................. 34 ........................................................................................... 36 ........................................................................... 38 ............................................................. 39 .............................................................. 45 .................................................................... 48 ................................................. 37 3UHOLPLQDU\ ...
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... CCS Added Command Sequence Error Note (Table 7) Datasheet renamed from Smart 3 Advanced Boot Block 4-Mbit, 8-Mbit, 16-Mbit Flash -006 Memory Family. Added device ID information for 4-Mbit x8 device Removed 32-Mbit x8 to reflect product offerings Minor text changes Corrected RP# pin description in Table 2, 3 Volt Advanced Boot Block Pin Descriptions ...
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... Number -008 4-Mbit packaging and addressing information corrected throughout document -009 Corrected 4-Mbit memory addressing tables in Appendices D and E Max I -010 V CC Added 64-Mbit density and faster speed offerings -011 Removed access time vs. capacitance load curve Changed references of 32Mbit 80ns devices to 70ns devices to reflect the faster product offering ...
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... Introduction This datasheet contains the specifications for the 3 Volt Advanced Boot Block flash memory family, which is optimized for low power, portable systems. This family of products features 1.65 V–2 2.7 V–3.6 V I/Os and a low V program, and erase operations. In addition this family is capable of fast programming ...
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... (for fast production programming) and read with V many designs read from the flash memory a large percentage of the time, 2 provide substantial power savings. The 3 Volt Advanced Boot Block flash memory products are available in either x8 or x16 packages in the following densities: (see • ...
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... Product Description This section explains device pin description and package pinouts. 2.1 Package Pinouts The 3 Volt Advanced Boot Block flash memory is available in 40-lead TSOP (x8, 48-lead TSOP (x16, and 48-ball VF BGA (x16, upgrades have been circled. Figure 1. 40-Lead TSOP Package for x8 Configurations A 16 ...
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Figure 2. 48-Lead TSOP Package for x16 Configurations WE# RP# V ...
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Figure 4. x16 48-Ball Very Thin Profile Pitch BGA and µBGA* Chip Size Package (Top View, Ball Down CCQ F GND NOTES: 1. Shaded connections ...
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... OUTPUT ENABLE: Enables the device’s outputs through the data buffers during a read operation. OE# INPUT OE# is active low. WRITE ENABLE: Controls writes to the Command Register and memory array. WE# is active low. WE# INPUT Addresses and data are latched on the rising edge of the second WE# pulse. ...
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... Block Organization The 3 Volt Advanced Boot Block is an asymmetrically-blocked architecture that enables system integration of code and data within a single flash device. Each block can be erased independently of the others up to 100,000 times. For the address locations of each block, see the memory maps in Appendix C. ...
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... CE# and OE# must be driven active to obtain data at the outputs. CE# is the device selection control; when active it enables the flash memory device. OE# is the data output control and it drives the selected memory data onto the I/O bus. For all read modes, WE# and RP# must ...
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... If RP# is taken low for time t aborted and the memory contents at the aborted location (for a program) or block (for an erase) are no longer valid, since the data may be partially erased or written. The abort process goes through the following sequence: When RP# goes low, the device shuts down the operation in progress, a ...
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When the device is in read array mode, four control signals control data output: • WE# must be logic high (V • CE# must be logic low (V • OE# must be logic low (V ...
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Read Identifier To read the manufacturer and device codes, the device must be in read identifier mode, which can be reached by writing the Read Identifier command (90H). Once in read identifier mode, A outputs the manufacturer’s identification code ...
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... The WSM will execute a sequence of internally timed events to program desired bits of the addressed location, then verify the bits are sufficiently programmed. Programming the memory results in specific bits within an address location being changed to a “0.” If the user attempts to program “1”s, the memory cell contents do not change and no error occurs. ...
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... Since an erase operation requires on the order of seconds to complete, an Erase Suspend command is provided to allow erase-sequence interruption in order to read data from or program data to another block in memory. Once the erase sequence is started, writing the Erase Suspend command to the CUI requests that the WSM pause the erase sequence at a predetermined point in the erase algorithm ...
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... Operation aborted operation to locked blocks SR.0 = RESERVED FOR FUTURE ENHANCEMENTS (R) NOTE: A Command Sequence Error is indicated when both SR.4, SR.5 and SR.7 are set. 3.3 Block Locking The 3 Volt Advanced Boot Block flash memory architecture features two hardware-lockable parameter blocks. 3.3.1 WP for Block Locking IL The lockable blocks are locked when WP will result in an error, which will be reflected in the status register ...
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... IH These blocks can now be programmed or erased. Note that RP# does not override WP# locking as in previous Boot Block devices. WP# controls all block locking and V protection methods. Table 8. Write Protection Truth Table for the Advanced Boot Block Flash Memory Family V WP ...
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... Automatic Power Savings (APS) Automatic Power Savings provides low-power operation during read mode. After data is read from the memory array and the address lines are quiescent, APS circuitry places the device in a mode where typical current is comparable to I until a new location is read. ...
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... The use of RP# during system reset is important with automated program/erase devices since the system expects to read from the flash memory when it comes out of reset CPU reset occurs without a flash memory reset, proper CPU initialization will not occur because the flash memory may be providing status information instead of array data ...
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Electrical Specifications 4.1 Absolute Maximum Ratings Extended Operating Temperature During Read During Block Erase and Program Temperature under Bias Storage Temperature Voltage On Any Pin (except V V Voltage (for Block Erase and Program) ...
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Operating Conditions Symbol T Operating Temperature A V CC1 V V CC2 CC V CC3 V CCQ1 V I/O Supply Voltage CCQ2 V CCQ3 V PP1 V PP2 Program and Erase Voltage V PP3 V PP4 Cycling Block Erase ...
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DC Characteristics Sym Parameter I Input Load Current LI I Output Leakage Current LO V Standby Current for CC 0.18 Micron Product I CCS V Standby Current for CC 0.25 Micron and 0.4 Micron ...
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DC Characteristics, Continued Sym Parameter Erase Current CC PP for 0.18 Micron Product I CCE +I PPE Erase Current CC PP for 0.25 Micron and 0.4 Micron Product I V Erase Suspend PPES PP ...
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Since each column lists specifications for a different V conditions V Max voltage listed at the top of each column Automatic Power Savings (APS) reduces I 4. Sampled, not 100% ...
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AC Characteristics —Read Operations Density Product # Sym Parameter R1 t Read Cycle Time AVAV R2 t Address to Output Delay AVQV ( CE# to Output Delay ELQV ( OE# to Output Delay GLQV R5 ...
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AC Characteristics, Continued Density Product 70 ns Para- # Sym meter V 2.7 V–3 Min R1 t Read Cycle Time 70 AVAV Address to Output R2 t AVQV Delay CE# to Output R3 ...
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AC Characteristics, Continued Density Product Para- # Sym meter V 2.7 V–3.6 V 2.7 V–3.6 V 3.0 V–3.3 V 2.7 V–3.3 V 3.0 V–3.3 V 2.7 V–3 Min R1 t Read Cycle Time AVAV Address to Output R2 ...
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AC Characteristics, Continued # Sym R1 t Read Cycle Time AVAV R2 t Address to Output Delay AVQV R3 t CE# to Output Delay ELQV R4 t OE# to Output Delay GLQV R5 t RP# ...
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AC Characteristics —Write Operations # Sym Parameter t / PHWL W1 RP# High Recovery to WE# (CE#) Going Low t PHEL t / ELWL W2 CE# (WE#) Setup to WE# (CE#) Going Low t WLEL t / ELEH W3 ...
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AC Characteristics—Write Operations, continued # Sym Parameter t / RP# High Recovery to WE# (CE#) PHWL W1 t Going Low PHEL t / CE# (WE#) Setup to WE# (CE#) Going ELWL W2 t Low WLEL ...
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AC Characteristics—Write Operations, continued # Sym Parameter t / RP# High Recovery to WE# (CE#) PHWL W1 t Going Low PHEL t / CE# (WE#) Setup to WE# (CE#) Going ELWL W2 t Low WLEL t / ELEH W3 WE# ...
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AC Characteristics—Write Operations, continued # Sym t / PHWL W1 RP# High Recovery to WE# (CE#) Going Low t PHEL t / ELWL W2 CE# (WE#) Setup to WE# (CE#) Going Low t WLEL t ...
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Program and Erase Timings Symbol 8-KB Parameter Block Program Time (Byte) t BWPB 4-KW Parameter Block Program Time (Word) 64-KB Main Block Program Time (Byte) t BWMB 32-KW Main Block Program Time(Word) Byte Program Time Word Program Time for ...
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Figure 8. AC Waveform: Program and Erase Operations ADDRESSES [ CE#(WE#) [E(W OE# [ WE#(CE#) [W(E ...
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Reset Operations Figure 9. AC Waveform: Deep Power-Down/Reset Operation Symbol RP# Low to Reset during Read t PLPH (If RP# is tied RP# Low to Reset during Block Erase or Program PLRH NOTES ...
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Ordering Information Package TE = 40-Lead/48-Lead TSOP GT = 48-Ball µBGA* CSP BGA CSP Product line designator ...
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Ordering Information Valid Combinations 40-Lead TSOP 48-Ball µBGA* CSP Ext. Temp. 64 Mbit Ext. Temp. 32 Mbit Ext. Temp. 16 Mbit (3) TE28F016B3TA90 GT28F016B3TA90 (3) TE28F016B3BA90 GT28F016B3BA90 (3) TE28F016B3TA110 GT28F016B3TA110 (3) TE28F016B3BA110 GT28F016B3BA110 (3) TE28F008B3TA90 GT28F008B3T90 (3) TE28F008B3BA90 GT28F008B3B90 Ext. ...
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... Intel or distribution sales office. 2. Visit Intel’s World Wide Web home page at http://www.Intel.com or http://developer.intel.com for technical documentation and tools. 3. For the most current information on Intel Advanced and Advanced+ Boot Block Flash memory, visit our microsite at http://developer.intel.com/design/flash/abblock. 36 Document/Tool http://developer ...
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Appendix A Write State Machine Current/Next States Data Read Current State SR.7 When Array Read (FFH) Read Read Array “1” Array Array Read Read Status “1” Status Array Read Read “1” Identifier Identifier Array Prog. Setup “1” Status Program “0” ...
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Appendix B Architecture Block Diagram V CCQ Input Buffer Address Latch Address Counter Output Buffer Identifier Register Status Register Power Data Reduction Comparator Control Y-Decoder Y-Gating/Sensing ...
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... Appendix C Word-Wide Memory Map Diagrams 16-Mbit and 32-Mbit Word-Wide Memory Addressing Top Boot Size 16 Mbit (KW) 4 FF000-FFFFF 4 FE000-FEFFF 4 FD000-FDFFF 4 FC000-FCFFF 4 FB000-FBFFF 4 FA000-FAFFF 4 F9000-F9FFF 4 F8000-F8FFF 32 F0000-F7FFF 32 E8000-EFFFF 32 E0000-E7FFF 32 D8000-DFFFF 32 D0000-D7FFF 32 C8000-CFFFF 32 C0000-C7FFF 32 B8000-BFFFF 32 B0000-B7FFF 32 A8000-AFFFF 32 A0000-A7FFF 32 98000-9FFFF 32 90000-97FFF 32 88000-8FFFF 32 80000-87FFF 32 78000-7FFFF 32 70000-77FFF ...
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... Word-Wide Memory Addressing (Continued) Top Boot Size 16 Mbit (KW Size 32 Mbit (KW) 0F8000-0FFFFF 32 0F0000-0F7FFF 32 0E8000-0EFFFF 32 0E0000-0E7FFF 32 0D8000-0DFFFF 32 0D0000-0D7FFF ...
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... Word-Wide Memory Addressing Top Boot Size 4 Mbit (KW) 3F000-3FFFF 7F000-7FFFF 3E000-3EFFF 7E000-7EFFF 3D000-3DFFF 7D000-7DFFF 3C000-3CFFF 7C000-7CFFF 3B000-3BFFF 7B000-7BFFF 3A000-3AFFF 7A000-7AFFF 39000-39FFF 79000-79FFF 38000-38FFF 78000-78FFF 4 30000-37FFF 70000-77FFF 4 28000-2FFFF 68000-6FFFF 4 20000-27FFF 60000-67FFF 4 18000-1FFFF 58000-5FFFF 4 10000-17FFF 50000-57FFF 4 08000-0FFFF 48000-4FFFF 4 00000-07FFF 40000-47FFF 4 38000-3FFFF ...
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... Word-Wide Memory Addressing Top Boot Size 16 Mbit 32 Mbit (KW) 4 FF000-FFFFF 1FF000-1FFFFF 4 FE000-FEFFF 1FE000-1FEFFF 4 FD000-FDFFF 1FD000-1FDFFF 4 FC000-FCFFF 1FC000-1FCFFF 4 FB000-FBFFF 1FB000-1FBFFF 4 FA000-FAFFF 1FA000-1FAFFF 4 F9000-F9FFF 1F9000-1F9FFF 4 F8000-F8FFF 1F8000-1F8FFF 32 F0000-F7FFF 1F0000-1F7FFF 32 E8000-EFFFF 1E8000-1EFFFF 32 E0000-E7FFF 1E0000-1E7FFF 32 D8000-DFFFF ...
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... Word-Wide Memory Addressing (Continued) Top Boot Size 16 Mbit 32 Mbit (KW) 32 0A8000-0AFFFF 32 0A0000-0A7FFF 32 098000-09FFFF 32 090000-097FFF 32 088000-08FFFF 32 080000-087FFF 32 078000-07FFFF 32 070000-077FFF 32 068000-06FFFF 32 060000-067FFF 32 058000-05FFFF 32 050000-057FFF 32 048000-04FFFF 32 040000-047FFF 32 038000-03FFFF 32 030000-037FFF 32 028000-02FFFF 32 020000-027FFF 32 018000-01FFFF 32 010000-017FFF 32 008000-00FFFF 32 000000-007FFF ...
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... Word-Wide Memory Addressing (Continued) Top Boot Size 16 Mbit 32 Mbit (KW Size 64 Mbit 16 Mbit (KW) 0F8000-0FFFFF 32 C0000-C7FFF 0F0000-0F7FFF ...
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... Appendix D Byte-Wide Memory Map Diagrams 8-Mbit and 16-Mbit Byte-Wide Byte-Wide Memory Addressing Top Boot Size (KB) 8 Mbit 8 FE000-FFFFF 8 FC000-FDFFF 8 FA000-FBFFF 8 F8000-F9FFF 8 F6000-F7FFF 8 F4000-F5FFF 8 F2000-F3FFF 8 F0000-F1FFF 64 E0000-EFFFF 64 D0000-DFFFF 64 C0000-CFFFF 64 B0000-BFFFF 64 A0000-AFFFF 64 90000-9FFFF 64 80000-8FFFF 64 70000-7FFFF 64 60000-6FFFF 64 50000-5FFFF 64 40000-4FFFF 64 30000-3FFFF 64 20000-2FFFF 64 10000-1FFFF 64 00000-0FFFF 64 64 ...
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... Byte-Wide Memory Addressing (Continued) Top Boot Size (KB) 8 Mbit Mbit Size (KB ...
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... Byte-Wide Memory Addressing Size 4 Mbit (KB) 64 70000-7FFFF 64 60000-6FFFF 64 50000-5FFFF 64 40000-4FFFF 64 30000-3FFFF 64 20000-2FFFF 64 10000-1FFFF 8 0E000-0FFFF 8 0C000-0DFFF 8 0A000-0BFFF 8 08000-09FFF 8 06000-07FFF 8 04000-05FFF 8 ...
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Appendix E Program and Erase Flowcharts Figure 10. Program Flowchart Start Write 40H Program Address/Data Read Status Register SR Yes Full Status Check if Desired Program Complete FULL STATUS CHECK PROCEDURE Read Status ...
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Figure 11. Program Suspend/Resume Flowchart Start Write B0H Write 70H Read Status Register SR SR Write FFH Read Array Data Done Reading Yes Write D0H Program Resumed 3UHOLPLQDU\ 28F004/400B3, 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 Operation 0 0 ...
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Figure 12. Block Erase Flowchart Start Write 20H Write D0H and Block Address Read Status Register SR Full Status Check if Desired Block Erase Complete FULL STATUS CHECK PROCEDURE Read Status Register Data ...
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Figure 13. Erase Suspend/Resume Flowchart Start Write B0H Write 70H Read Status Register SR SR Write FFH Read Array Data Done Reading Yes Write D0H Erase Resumed 3UHOLPLQDU\ 28F004/400B3, 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 Bus Operation Write ...
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