ELANSC400-66AI AMD (ADVANCED MICRO DEVICES), ELANSC400-66AI Datasheet - Page 76

ELANSC400-66AI

Manufacturer Part Number
ELANSC400-66AI
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of ELANSC400-66AI

Cpu Family
Elan
Device Core Size
16/32Bit
Frequency (max)
66MHz
Interface Type
ISA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 95C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
292
Package Type
BGA
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ELANSC400-66AI
Manufacturer:
AMD
Quantity:
12 388
CLOCKING
Clock Generation
The ÉlanSC400 and ÉlanSC410 microcontrollers re-
quire only one 32.768-kHz crystal to generate all the
other clock frequencies required by the system. The
output of the on-chip crystal oscillator circuit is used to
generate the various frequencies by utilizing four
Phase-Locked Loop (PLL) circuits. The PLL clock dis-
tribution scheme is shown in Figure 4. Table 26 shows
all the PLL output frequencies and their usage. (Note
that these four PLL circuits are in addition to the inter-
nal CPU PLL and do not replace it.)
The crystal oscillator needs two pins, but it does not re-
quire any external components except the crystal; the
Notes:
On the ÉlanSC400 microcontroller, the graphics controller’s DRAM interface is clocked by the 66-MHz DRAM clock.
Both the ROM/Flash memory interface and the PC Card controller are clocked from the CPU clock. They also have the option
to be run from the slow system clock.
Neither the graphics controller nor the PC Card controller are supported on the ÉlanSC410 microcontroller.
76
32.768-kHz
Oscillator
Crystal
Intermediate
PLL
32.768 kHz
Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
1.47456 MHz
Low-Speed
Figure 4. Clock Generation Block Diagram
PLL
High-Speed
36.864 MHz
PLL
66.3552 MHz
Dot Clock
Graphics
load capacitors and the feedback resistor are inte-
grated on-chip.
The four PLLs are called Intermediate PLL, Low-Speed
PLL, High-Speed PLL, and Graphics Dot Clock PLL.
Each of the integrated phase-locked loops has a dedi-
cated pin to support the required external loop filter.
These pins are: LF_INT (Intermediate PLL), LF_LS
(Low-Speed PLL), LF_HS (High-Speed PLL), and
LF_VID (Graphics Dot Clock PLL). (The LF_VID pin is
not supported on the ÉlanSC410 microcontroller.) Two
capacitors and one resistor are required to implement
each loop filter.
PLL
36.864 MHz
20.736–
Real-Time
Clock
PMU
DRAM
Controller
UART
Timer
Graphics
Controller
DRAM
Controller
ISA Bus
DMA
Controller
CPU and
VL-Bus
Controller
ROM/Flash
Interface
PC Card
Controller

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