ELANSC400-66AI AMD (ADVANCED MICRO DEVICES), ELANSC400-66AI Datasheet - Page 98

• Manufacturer Part Number: ELANSC400-66AI
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ELANSC400-66AI

• Cpu Family: Elan
• Device Core Size: 16/32Bit
• Frequency (max): 66MHz
• Interface Type: ISA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 95C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 292
• Package Type: BGA
• Lead Free Status / Rohs Status: Not Compliant

Notes:
1. All timings assume 70-ns DRAMs, fastest programmable timing, and a 66-MHz clock for the memory controller.
98
Symbol
t12a
t12b
t14a
t14b
t6a
t6a
t6b
t7a
t7b
t8a
t8b
t9a
t9b
t10
t13
t15
t16
t17
t18
t19
t20
t21
t22
t23
t24
t25
t26
t27
t28
t29
t30
t31
t32
t33
t9c
t11
t1
t2
t3
t4
t5
Parameter Description
RAS to CAS delay
Row address hold time
Column address hold time
CAS pulse width (CPU, Fast Page mode)
CAS pulse width (graphics controller, Fast Page mode)
CAS pulse width (EDO mode)
CAS precharge (non-interleaved)
CAS precharge (interleaved)
CAS hold
CAS hold (EDO)
Fast page mode cycle time (non-interleaved)
Fast page mode cycle time (interleaved)
Access time from column address
Access time from CAS
Access time from CAS (EDO)
Read data hold from CAS
Read data hold from CAS (EDO)
MA12–MA0 switching time
MWE setup to CAS
MWE hold from CAS
Write data setup to CAS
Write data hold from CAS
RAS precharge
RAS pulse width
RAS hold
MWE pulse width (EDO)
RAS to CAS precharge time
CAS setup time (CAS-before-RAS refresh)
CAS hold time (CAS-before-RAS refresh)
RAS pulse width during self-refresh cycle
RAS precharge time during self-refresh cycle
WE setup time (CAS-before-RAS refresh)
WE hold time (CAS-before-RAS refresh)
Row address setup time
Column address setup time
EDO mode cycle time
Access time from RAS
Access time from CAS precharge
Delay between bank CAS signals
MWE low from CAS (EDO data disable)
Data high impedance from MWE
Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
Table 37. DRAM Cycles
Notes
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
External Bus
42.75
14.25
14.25
42.75
14.25
71.25
14.25
14.25
28.5
28.5
85.5
66.5
66.5
28.5
Min
100
130
114
57
57
35
20
22
40
10
30
10
30
60
75
15
10
25
25
25
5
0
0
5
33-MHz
Max
15
15
15
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
us
ns
ns
ns