ELANSC400-66AI AMD (ADVANCED MICRO DEVICES), ELANSC400-66AI Datasheet - Page 88

• Manufacturer Part Number: ELANSC400-66AI
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ELANSC400-66AI

• Cpu Family: Elan
• Device Core Size: 16/32Bit
• Frequency (max): 66MHz
• Interface Type: ISA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 95C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 292
• Package Type: BGA
• Lead Free Status / Rohs Status: Not Compliant

TYPICAL POWER NUMBERS
Power Requirements Under Different Power Management Modes
Table 34 shows the maximum and typical power dissipation for the ÉlanSC400 and ÉlanSC410 microcontrollers.
Notes:
1. Hyper-Speed mode is defined with a CPU clock frequency of 66 or 100 MHz. There is a time penalty to engage and disengage
2. High-Speed mode is defined with a maximum CPU clock speed of 33 MHz with a 1x dynamic clock-speed change control
3. Low-Speed mode limits the maximum CPU clock frequency to 8 MHz. Table 34 assumes 8 MHz/2 = ~4.125 (CPU speed) and
4. Standby mode is defined as having the CPU idle and stopped (0 MHz), but video screen refresh continues. IRQ0 (DOS Timer
5. Off is defined as the V
88
Maximum at 3.3 V
Typical at 3.3 V
Maximum at 2.7 V
Typical at 2.7 V
Hyper-Speed mode, because a CPU Stop Clock/Stop Grant sequence is required to “arbitrate” the internal CPU PLL start-
up, cache flush, and the clearing of all internal pipelines and write buffers. The DX2 mode (66 MHz) is a clock-doubled mode
with the CPU operating at 66 MHz and the rest of the system logic operating at 33 MHz. The DX4 mode (100 MHz) is a clock
tripled mode with the CPU running at 100 MHz and the rest of the system running at 33 MHz.
capability. Dynamic clock control allows fast, unarbitrated CPU clock-speed changes. Table 34 assumes a CPU frequency of
33 MHz and that the internal LCD controller is enabled. Other High-Speed mode power estimates with CPU V
shown below:
CPU Clock = 33 MHz/2 = 16.5 MHz, Max = 601 mW, Typical = 480 mW
CPU Clock = 33 MHz/4 = 8.25 MHz, Max = 370 mW, Typical = 296 mW
that the Internal LCD controller is enabled. Other Low-Speed power estimates with CPU at 3.3 V are shown below:
8 MHz/1 = 8.25 MHz,
8 MHz/4 = 2.06 MHz,
IRQ source) is assumed to be programmed as an activity and is generated at a rate of 60 Hz. This causes the PMU to tran-
sition to the Temporary Low-Speed mode where the CPU is clocked at 8 MHz. The assumed duration of the IRQ0 handler
routine is 25 s and, upon the interrupt return instruction, the PMU immediately re-enters the Standby mode, the LCD con-
troller is enabled, and DRAM refresh type is slow CAS-before-RAS.
core CPU, power management unit, PLLs, etc. have no power applied. The RTC will have an internally isolated power plane
and source its power from the V
Hyper-Speed
CC
(100 MHz)
(~665 mA)
Max = 370 mW, Typical = 296 mW
2194 mW
1818 mW
Max = 164 mW, Typical = 132 mW
_RTC supply pin having power applied and all other V
Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
(551 mA)
N/A
N/A
CC
_RTC supply pin.
1
Hyper-Speed
Table 34. Power Estimates
(~463 mA)
(~370 mA)
1527 mW
1222 mW
(66 MHz)
941 mW
753 mW
Power Management Mode (CPU Clock Speed)
1
High-Speed
(~266 mA)
(~213 mA)
(33 MHz)
879 mW
703 mW
586 mW
469 mW
2
CC
Low-Speed
pins are not powered. In this mode, the
(~4 MHz)
(~73 mA)
(~58 mA)
240 mW
192 mW
144 mW
115 mW
3
Standby
(~19 mA)
(~15 mA)
(0 MHz)
63 mW
50 mW
60 mW
48 mW
CC
4
= 3.3 V are
(4.8 A)
(10 A)
33 W
16 W
33 W
16 W
Off
5