ISP1761BE STEricsson, ISP1761BE Datasheet - Page 32
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ISP1761BE
Manufacturer Part Number
ISP1761BE
Description
Manufacturer
STEricsson
Datasheet
1.ISP1761BE.pdf
(164 pages)
Specifications of ISP1761BE
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Operating Temperature (max)
85C
Package Type
LQFP
Rad Hardened
No
Lead Free Status / Rohs Status
Supplier Unconfirmed
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISP1761BE
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
ISP1761_5
Product data sheet
The internal POR pulse will be generated whenever V
than 11 s.
The recommended RESET input pulse length at power-on must be at least 2 ms to ensure
that internal clocks are stable.
The RESET_N pin can be either connected to V
externally controlled by the microcontroller, ASIC, and so on.
availability of the clock with respect to the external POR.
Fig 11. Internal power-on reset timing
Fig 12. Clock with respect to the external power-on reset
(1) PORP = Power-On Reset Pulse.
Stable external clock is available at A.
t0
t1
t
PORP
Rev. 05 — 13 March 2008
EXTERNAL CLOCK
RESET_N
t2
t3
t
PORP
CC(I/O)
A
CC(5V0)
, using the internal POR circuit or
t4
004aaa583
Hi-Speed USB OTG controller
t5
drops below V
Figure 12
004aaa584
© NXP B.V. 2008. All rights reserved.
shows the
ISP1761
V
V
PORP
CC(5V0)
TRIP
TRIP
(1)
for more
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