SST49LF004B-33-4C-NH Microchip Technology, SST49LF004B-33-4C-NH Datasheet - Page 25

Flash 512K X 8 33ns

SST49LF004B-33-4C-NH

Manufacturer Part Number
SST49LF004B-33-4C-NH
Description
Flash 512K X 8 33ns
Manufacturer
Microchip Technology
Datasheet

Specifications of SST49LF004B-33-4C-NH

Data Bus Width
8 bit
Memory Type
NAND
Memory Size
4 Mbit
Architecture
Sectored
Interface Type
LPC
Access Time
33 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Current
12 mA
Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
PLCC-32
Organization
512 KB x 8
Lead Free Status / Rohs Status
No

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4 Mbit Firmware Hub
SST49LF004B
TABLE 18: I
TABLE 19: R
©2007 Silicon Storage Technology, Inc.
Symbol
V
V
V
V
Input Signal Edge Rate
T
T
T
T
T
PRST
RSTP
RSTF
RST
RSTE
TH
TL
TEST
MAX
FIGURE 9: R
1. The input test environment is done with 0.1 V
1. There will be a latency due to T
Symbol
1
1
1
drive than this. V
different voltage values, but must correlate results back to these parameters.
1
RST#/INIT#
LFRAME#
LAD[3:0]
V
NTERFACE
ESET
DD
Parameter
V
RST# Pulse Width
RST# Low to Output Float
RST# High to LFRAME# Low
RST# Low to reset during Sector-/Block-Erase or Program
DD
ESET
MAX
stable to Reset High
T
IMING
specifies the maximum peak-to-peak waveform allowed for measuring input timing. Production testing may use
T
M
IMING
EASUREMENT
P
ARAMETERS
D
RSTE
IAGRAM
if a reset procedure is performed during a Program or Erase operation,
C
(LPC M
, V
ONDITION
DD
DD
of overdrive over V
=3.0-3.6V (LPC M
ODE
P
)
ARAMETERS
T
PRST
25
IH
and V
T
RSTF
ODE
(LPC M
IL
. Timing parameters must be met with no more over-
)
T
RSTP
ODE
T
Min
100
100
RSTE
5
)
0.6 V
0.2 V
0.4 V
0.4 V
Value
1
DD
DD
DD
DD
T
RST
Max
48
10
or Program operation
Sector-/Block-Erase
aborted
S71307-03-EOL
EOL Data Sheet
1307 F08.0
LCLK cycles
Units
V/ns
Units
V
V
V
V
ns
ns
µs
µs
T18.0 1307
T19.0 1307
12/07

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