74LV132PW NXP Semiconductors, 74LV132PW Datasheet - Page 15

Gates (AND / NAND / OR / NOR) QUAD 2-INPUT NAND SCHMITT TRIG

74LV132PW

Manufacturer Part Number
74LV132PW
Description
Gates (AND / NAND / OR / NOR) QUAD 2-INPUT NAND SCHMITT TRIG
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LV132PW

Product
NAND
Logic Family
LV
Number Of Gates
4
Number Of Lines (input / Output)
2 / 1
High Level Output Current
- 12 mA
Low Level Output Current
12 mA
Propagation Delay Time
65 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-402
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
 Details
Other names
74LV132PW,112

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74LV132PW
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
74LV132PWЈ¬118
Manufacturer:
NXP
Quantity:
2 500
NXP Semiconductors
16. Abbreviations
Table 11.
17. Revision history
Table 12.
74LV132_5
Product data sheet
Acronym
CMOS
DUT
ESD
HBM
MM
TTL
Document ID
74LV132_5
Modifications:
74LV132_4
74LV132_3
74LV132_2
74LV132_1
Abbreviations
Revision history
Description
Complementary Metal Oxide Semiconductor
Device Under Test
ElectroStatic Discharge
Human Body Model
Machine Model
Transistor-Transistor Logic
Release date
20090702
20071112
20040415
19980428
19970204
Table
changed.
6: the conditions for HIGH-level output voltage and LOW-level output voltage have been
Data sheet status
Product data sheet
Product data sheet
Product specification
Product specification
Product specification
Rev. 05 — 2 July 2009
Change notice
-
-
-
-
-
Quad 2-input NAND Schmitt trigger
Supersedes
74LV132_4
74LV132_3
74LV132_2
74LV132_1
-
© NXP B.V. 2009. All rights reserved.
74LV132
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