74LV132PW NXP Semiconductors, 74LV132PW Datasheet - Page 2

• Manufacturer Part Number: 74LV132PW
• Description: Gates (AND / NAND / OR / NOR) QUAD 2-INPUT NAND SCHMITT TRIG
• Manufacturer: NXP Semiconductors

Specifications of 74LV132PW

• Product: NAND
• Logic Family: LV
• Number Of Gates: 4
• Number Of Lines (input / Output): 2 / 1
• High Level Output Current: - 12 mA
• Low Level Output Current: 12 mA
• Propagation Delay Time: 65 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-402
• Minimum Operating Temperature: - 40 C
• Lead Free Status / Rohs Status: Details
• Other names: 74LV132PW,112

NXP Semiconductors
4. Ordering information
Table 1.
5. Functional diagram
74LV132_5
Product data sheet
Type number
74LV132N
74LV132D
74LV132DB
74LV132PW
74LV132BQ
Fig 1. Logic symbol
10
12
13
1
2
4
5
9
1A
1B
2A
2B
3A
3B
4A
4B
Ordering information
Package
Temperature range Name
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
mna407
1Y
2Y
3Y
4Y
3
6
8
11
DIP14
SO14
SSOP14
TSSOP14
DHVQFN14 plastic dual in-line compatible thermal enhanced very
Fig 2. IEC logic symbol
10
12
13
1
2
4
5
9
Rev. 05 — 2 July 2009
Description
plastic dual in-line package; 14 leads (300 mil)
plastic small outline package; 14 leads;
body width 3.9 mm
plastic shrink small outline package; 14 leads;
body width 5.3 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
thin quad flat package; no leads; 14 terminals;
body 2.5
&
&
&
&
mna408
3
0.85 mm
11
3
6
8
Quad 2-input NAND Schmitt trigger
Fig 3. Logic diagram (one gate)
A
B
© NXP B.V. 2009. All rights reserved.
74LV132
Version
SOT27-1
SOT108-1
SOT337-1
SOT402-1
SOT762-1
mna409
Y
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