P89LV51RD2BBC NXP Semiconductors, P89LV51RD2BBC Datasheet - Page 16

• Manufacturer Part Number: P89LV51RD2BBC
• Description: MCU 8-Bit 89LV 80C51 CISC 64KB Flash 3.3V 44-Pin TQFP Tray
• Manufacturer: NXP Semiconductors

Specifications of P89LV51RD2BBC

• Package: 44TQFP
• Device Core: 80C51
• Family Name: 89LV
• Maximum Speed: 40 MHz
• Ram Size: 1 KB
• Program Memory Size: 64 KB
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 32
• Interface Type: SPI/UART
• Operating Temperature: 0 to 70 °C
• Number Of Timers: 3

NXP Semiconductors
Table 6.
P89LV51RB2_RC2_RD2_5
Product data sheet
Reset source
External reset
Power-on reset
Watchdog reset
Brownout detect reset
Software reset
Effects of reset sources on bank selection
6.2.5 Watchdog reset
6.2.6 Data RAM memory
6.2.7 Expanded data RAM addressing
V
detection circuit will respond.
Brownout interrupt can be enabled by setting the EBO bit (IEN1.3). If EBO bit is set and a
brownout condition occurs, a brownout interrupt will be generated to execute the program
at location 004BH. It is required that the EBO bit is cleared by software after the brownout
interrupt is serviced. Clearing EBO bit when the brownout condition is active will properly
reset the device. If brownout interrupt is not enabled, a brownout condition will reset the
program to resume execution at location 0000H. A brownout detect reset will clear the
BSEL bit (FCF.0) but will not change the SWR bit (FCF.1) and therefore will not change the
banking of the lower 8 kB of user code memory space.
Like a brownout detect reset, the watchdog timer reset will clear the BSEL bit (FCF.0) but
will not change the SWR bit (FCF.1) and therefore will not change the banking of the lower
8 kB of user code memory space.
The state of the SWR and BSEL bits after different types of resets is shown in
This results in the code memory bank selections as shown.
The data RAM has 1024 B of internal memory. The device can also address up to 64 kB
for external data memory.
The P89LV51RB2/RC2/RD2 has 1 kB of RAM. See
memory structure” on page
The device has four sections of internal data memory:
SWR bit result
(FCF.1)
0
x
1
1. The lower 128 B of RAM (00H to 7FH) are directly and indirectly addressable.
2. The higher 128 B of RAM (80H to FFH) are indirectly addressable.
3. The special function registers (80H to FFH) are directly addressable only.
4. The expanded RAM of 768 B (00H to 2FFH) is indirectly addressable by the move
DD
external instruction (MOVX) and clearing the EXTRAM bit (see ‘Auxiliary function
Register’ (AUXR) in
must stay below V
BSEL bit result
(FCF.0)
0
0
0
Rev. 05 — 15 December 2009
bo
Table 4 “Special function registers” on page
at least four oscillator clock periods before the brownout
19.
Addresses from 0000H to
1FFFH
Boot code (in block 1)
Retains state of SWR bit. If
SWR, BSEL = 00 then uses
boot code. If SWR,
BSEL = 10 then uses user
code.
User code (in block 0)
P89LV51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
Figure 5 “Internal and external data
Addresses above
1FFFH
User code (in block 0)
11).
© NXP B.V. 2009. All rights reserved.
Table
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6.