MT90870AG Zarlink, MT90870AG Datasheet - Page 16
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MT90870AG
Manufacturer Part Number
MT90870AG
Description
Switch Fabric 12K x 12K/8K x 4K 1.8V/3.3V 272-Pin BGA Tray
Manufacturer
Zarlink
Datasheet
1.MT90870AG.pdf
(86 pages)
Specifications of MT90870AG
Package
272BGA
Number Of Ports
32
Fabric Size
12K x 12K|8K x 4K
Switch Core
Non-Blocking|Blocking
Port Speed
2.048|4.096|8.192|16.384 Mbps
Operating Supply Voltage
1.8|3.3 V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT90870AG2
Manufacturer:
ZARLINK
Quantity:
41
Pin Description (continued)
FP16o
FP8o
LSTo0 - 15
LCSTo0-1
ODE
Name
W14
V14
A17, A18, A19,
B18, B19, B20,
C18, C19, C20,
D18, D19, D20,
E17, E18, E19,
E20,
C17, C16
A12
Coordinates
Package
for 61 ns at the frame boundary. The frame pulse, running at a 8 KHz rate,
will be the same format (ST-BUS or GCI-BUS) as the input frame pulse
(FP8i).
Frame Pulse Output (Three-state Output). Frame pulse output is active
for 122 ns at the frame boundary. The frame pulse, running at 8 KHz rate,
will be the same style (ST-BUS or GCI-BUS) as the input frame pulse
(FP8i).
Local Serial Output Streams 0 to 15 (5 V Tolerant Three-state
Outputs). These pins output serial TDM data streams at a data-rate of:
16.384 Mb/s (with 256 channels per stream),
8.192 Mb/s (with 128 channels per stream),
4.096 Mb/s (with 64 channels per stream), or
2.048 Mb/s (with 32 channels per stream).
The data-rate is independently programmable for each output stream.
Refer to descriptions of the LORS and ODE pins for control of the output
High or High-Impedance state.
Local Output Channel High Impedance Control (5 V Tolerant Three-
state Outputs).
Active high output enable: used to control, on a per-channel basis, the
external buffering of Local output streams.
LCSTo0 is the output enable for streams: LSTo[0,2,4,6,8,10,12, and 14].
LCSTo1 is the output enable for streams: LSTo[1,3,5,7,9,11,13, and 15].
Refer to descriptions of the LORS and ODE pins for control of the output
High or High-Impedance state.
Output Drive Enable (5 V Tolerant, Internal pull-up).
An asynchronous input providing Output Enable control to the BSTo0- 31,
LSTo0-15, BCSTo0-3 and LCSTo0-1 outputs.
When LOW, the BSTo0-31 and LSTo0- 31 outputs are driven high or high
impedance (dependent on the BORS and LORS pin settings respectively)
and the outputs BCSTo0-3 and LCSTo0-1 are driven low.
When HIGH, the outputs BSTo0- 31, LSTo0-15, BCSTo0-3 and LCSTo0-1
are enabled.
Frame Pulse Output (Three-state Output). Frame pulse output is active
Zarlink Semiconductor Inc.
MT90870
16
Description
Data Sheet