MT90870AG Zarlink, MT90870AG Datasheet - Page 51

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MT90870AG

Manufacturer Part Number
MT90870AG
Description
Switch Fabric 12K x 12K/8K x 4K 1.8V/3.3V 272-Pin BGA Tray
Manufacturer
Zarlink
Datasheet

Specifications of MT90870AG

Package
272BGA
Number Of Ports
32
Fabric Size
12K x 12K|8K x 4K
Switch Core
Non-Blocking|Blocking
Port Speed
2.048|4.096|8.192|16.384 Mbps
Operating Supply Voltage
1.8|3.3 V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT90870AG2
Manufacturer:
ZARLINK
Quantity:
41
12.5
00CD
00ED
00A3
010D
012D
8-0
Bit
0003
0023
0043
0063
0083
A14 - A0
00CA
00CB
00CC
00C3
00C4
00C5
00C6
00C7
00C8
00C9
014D
3FFF
0000
0001
0002
H -
H -
H -
H -
H -
H -
H -
H -
H -
H -
Internal Register Mappings
BCAB8-0
0012
0032
0062
0082
0092
00C2
00DC
012C
014C
00FC
Name
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Table 14 - BCM Bits for Backplane-to-Backplane Switching (32 Mb/s mode)
H
Control Register, CR
Block Programming Register, BPR
BER Control Register, BERCR
Local Input Channel Delay Register 0, LCDR0 - Register 15, LCDR15
Local Input Bit Delay Register 0, LIDR0 - Register 15, LIDR15
Backplane Input Channel Delay Register 0, BCDR0 - Register 31, BCDR31
Backplane Input Bit Delay Register 0, BIDR0 - Register 31, BIDR31
Local Output Advancement Register 0, LOAR0 - Register 15, LOAR15
Backplane Output Advancement Register 0, BOAR0 - Register 31, BOAR31
Local BER Start Send Register, LBSSR
Local Transmit BER Length Register, LTXBLR
Local Receive BER Length Register, LRXBLR
Local BER Start Receive Register, LBSRR
Local BER Count Register, LBCR
Backplane BER Start Send Register, BBSSR
Backplane Transmit BER Length Register, BTXBLR
Backplane Receive BER Length Register, BRXBLR
Backplane BER Start Receive Register, BBSRR
Backplane BER Count Register, BBCR
Local Input Bit rate Register 0, LIBRR0 - Register 15, LIBRR15
Local Output Bit rate Register 0, LOBRR0 - Register 15, LOBRR15
Backplane Input Bit rate Register 0, BIBRR0 - Register 31, BIBRR31
Backplane Output Bit rate Register 0, BOBRR0 - Register 31, BOBRR31
Memory BIST Register, MBISTR
Revision control register, RCR
Source Channel Address Bits.
The binary value of these 9 bits represents the input channel number, when BMM is LOW.
Bits BCAB7-0 transmitted as data when BMM is set HIGH in Message Mode.
Table 15 - Address Map for Register (A14 = 0)
Zarlink Semiconductor Inc.
MT90870
51
Description
Register
Data Sheet

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