MT90870AG Zarlink, MT90870AG Datasheet - Page 61

• Manufacturer Part Number: MT90870AG
• Description: Switch Fabric 12K x 12K/8K x 4K 1.8V/3.3V 272-Pin BGA Tray
• Manufacturer: Zarlink

Specifications of MT90870AG

• Package: 272BGA
• Number Of Ports: 32
• Fabric Size: 12K x 12K|8K x 4K
• Switch Core: Non-Blocking|Blocking
• Port Speed: 2.048|4.096|8.192|16.384 Mbps
• Operating Supply Voltage: 1.8|3.3 V

Table 26 illustrates the bit delay selection.
13.8
Address 0083h to 0092h.
Sixteen Local output advancement registers (LOAR0 to LOAR15) allow users to program the output advancement
for output data streams LSTo0 to LSTo15. The possible adjustment is -2, -4 or -6 cycles of the internal system clock
(131.072 MHz).
Local Output Advancement Registers (LOAR0 to LOAR15)
0 (Default)
Data Rate
1 1/4
1 1/2
1 3/4
2 1/4
2 1/2
2 3/4
3 1/4
3 1/2
3 3/4
4 1/4
4 1/2
4 3/4
5 1/4
5 1/2
5 3/4
6 1/4
6 1/2
6 3/4
7 1/4
7 1/2
7 3/4
1/4
1/2
3/4
1
2
3
4
5
6
7
Table 26 - Backplane Input Bit Delay Programming Table
BID4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Zarlink Semiconductor Inc.
BID3
MT90870
Corresponding Delay Bits
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
61
BID2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
BID1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
BID0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Data Sheet