ISL23348UFVZ Intersil, ISL23348UFVZ Datasheet
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ISL23348UFVZ
Specifications of ISL23348UFVZ
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ISL23348UFVZ Summary of contents
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... FIGURE 2. V CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 1-888-468-3774 Intersil (and design) and XDCP are trademarks owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners = 5V LOGIC = 1.7V ...
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Block Diagram V LOGIC SCL SDA I/O A0 BLOCK A1 A2 Pin Configurations ISL23348 (20 LD TSSOP) TOP VIEW RL0 1 RW0 RH0 4 RL1 5 RW1 6 RH1 7 GND LOGIC 10 ...
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... Ordering Information PART NUMBER (Notes PART MARKING ISL23348TFVZ 23348 TFVZ ISL23348UFVZ 23348 UFVZ ISL23348WFVZ 23348 WFVZ ISL23348TFRZ 348T ISL23348UFRZ 348U ISL23348WFRZ 348W NOTES: 1. Add “-TK” suffix for 1k unit or “-T7A” suffix for 250 unit Tape and Reel options. Please refer to 2 ...
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... Thermal Resistance (Typical TSSOP Package (Notes QFN Package (Notes Maximum Junction Temperature (Plastic Package .+150°C Storage Temperature Range .-65°C to +150°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Recommended Operating Conditions Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C V Supply Voltage 1. Supply Voltage ...
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Analog Specifications V = 2.7V to 5.5V Boldface limits apply over the operating temperature range, -40°C to +125°C. SYMBOL PARAMETER VOLTAGE DIVIDER MODE ( RH; measured at RW, unloaded) CC INL Integral Non-linearity, Guaranteed ...
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Analog Specifications V = 2.7V to 5.5V Boldface limits apply over the operating temperature range, -40°C to +125°C. SYMBOL PARAMETER R Offset, Wiper at 0 Position offset (Note 16) Rmatch DCP to DCP Matching (Note 23) TCR Resistance ...
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Operating Specifications Boldface limits apply over the operating temperature range, -40°C to +125°C. SYMBOL PARAMETER t Wiper Response Time DCP tShdnRec DCP Recall Time from Shutdown Mode Ramp Rate CC, LOGIC CC , LOGIC Ramp (Note ...
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Serial Interface Specification SYMBOL PARAMETER t STOP Condition Set-up Time SU:STO t STOP Condition Hold Time for Read HD:STO or Write t Output Data Hold Time DH t SDA and SCL Rise Time R t SDA and SCL Fall Time ...
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DCP Macro Model Timing Diagrams SDA vs SCL Timing SCL t SU:STA t HD:STA SDA (INPUT TIMING) SDA (OUTPUT TIMING) A0, A1 and A2 Pin Timing START SCL SDA A0, A1 ISL23348 R TOTAL ...
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Typical Performance Curves 0.15 0.10 0.05 0.00 -0.05 -0.10 -0. TAP POSITION (DECIMAL) FIGURE 3. 10kΩ DNL vs TAP POSITION, V 0.15 0.10 0.05 0.00 -0.05 -0.10 -0. TAP POSITION (DECIMAL) FIGURE 5. 10kΩ ...
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Typical Performance Curves 0.30 0.25 0.20 0.15 0.10 0.05 0. TAP POSITION (DECIMAL) FIGURE 9. 10kΩ RINL vs TAP POSITION, V 100 +25° -40° TAP POSITION (DECIMAL) FIGURE 11. ...
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Typical Performance Curves 400 300 200 100 TAP POSITION (DECIMAL) FIGURE 15. 10kΩ TCr vs TAP POSITION TAP POSITION (DECIMAL) FIGURE 17. 100kΩ TCv vs TAP POSITION, V ...
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Typical Performance Curves 1V/DIV 0.2µs/DIV SCL 9TH CLOCK OF THE FIGURE 21. WIPER LARGE SIGNAL SETTLING TIME CH1: RH TERMINAL CH2: RW TERMINAL 0.5V/DIV, 0.2µs/DIV -3dB FREQUENCY = 1.437MHz AT MIDDLE TAP FIGURE 23. 10kΩ -3dB CUT OFF FREQUENCY Functional ...
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ISL23348. A maximum of eight ISL23348 devices may occupy the I bus (see Table 3). V LOGIC Digital power source for the logic control section. It supplies an internal level translator for ...
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POWER-UP MID SCALE = 80H USER PROGRAMMED SHDN ACTIVATED SHDN RELEASED SHDN MODE 0 TIME (s) FIGURE 26. SHUTDOWN MODE WIPER RESPONSE Serial Interface 2 The ISL23348 supports bidirectional bus oriented protocol. The protocol ...
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SCL FROM MASTER SDA OUTPUT FROM TRANSMITTER SDA OUTPUT FROM RECEIVER START SIGNALS FROM THE MASTER SIGNAL AT SDA SIGNALS FROM THE SLAVE S SIGNALS T FROM THE A IDENTIFICATION MASTER R BYTE WITH T R SIGNAL AT ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. ...
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Package Outline Drawing M20.173 20 LEAD THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP) Rev 2, 5/10 1 6.50 ±0.10 20 6.40 4.40 ±0. 0. TOP VIEW H C SEATING PLANE 0.10 C SIDE VIEW (5.65) ...
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Package Outline Drawing L20.3x4 20 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 1, 3/10 3. PIN 1 INDEX AREA A TOP VIEW (2.65) (3.80) (1.65) (2.80) TYPICAL RECOMMENDED LAND PATTERN 19 ISL23348 A B 20X 4 4.00 0.15 ...