NUC140VE3CN Nuvoton Technology Corporation of America, NUC140VE3CN Datasheet - Page 291

• Manufacturer Part Number: NUC140VE3CN
• Description: IC MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro™ NUC100r

Specifications of NUC140VE3CN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Go to 3) to continue another data transfer or disable the GO_BUSY bit to stop data transfer.
3)
4)
5)
6)
7)
4.
5.
6.
7.
If this SPI slave will transmits (be read) one byte data to the off-chip master device, write the
byte data that will be transmitted into the TX0 [7:0] (SPI_TX0[7:0]) register.
If this SPI slave just only receives (be written) one byte data from the off-chip master device,
you don’t care what data will be transmitted and just write 0xFF into the SPI_TX0[7:0]
register.
Enable the GO_BUSY bit (SPI_CNTRL[0] = 1) to wait for the slave select trigger input and
serial clock input from the off-chip master device to start the data transfer at the SPI
interface.
Waiting for SPI interrupt occurred (if the Interrupt Enable IE bit is set), or just polling the
GO_BUSY bit till it is cleared to 0 by hardware automatically.
Read out the received one byte data from RX[7:0] (SPI_RX0[7:0]) register.
NuMicro™ NUC130/NUC140 Technical Reference Manual
Select data latched at positive edge of serial clock in RX_NEG bit (SPI_CNTRL[1] = 0)
Set the bit length of word transfer as 8-bit in TX_BIT_LEN bit field (SPI_CNTRL[7:3] =
0x08)
Set only one time of word transfer in TX_NUM (SPI_CNTRL[9:8] = 0x0)
Set LSB transfer first in LSB bit (SPI_CNTRL[10] = 1), and don’t care the SP_CYCLE bit
field (SPI_CNTRL[15:12]) due to not burst mode in this case.
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Publication Release Date: June 14, 2011
Revision V2.01