NUC130RE3CN Nuvoton Technology Corporation of America, NUC130RE3CN Datasheet - Page 133

• Manufacturer Part Number: NUC130RE3CN
• Description: IC MCU 32BIT 128KB FLASH 64LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro™ NUC100r

Specifications of NUC130RE3CN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

[6]
[5]
[4]
[3]
[2]
[1]
[0]
NuMicro™ NUC130/NUC140 Technical Reference Manual
PD_WU_STS
PD_WU_INT_EN
PD_WU_DLY
OSC10K_EN
OSC22M_EN
XTL32K_EN
XTL12M_EN
mode, if the peripheral clock source is from external 32.768 kHz low speed crystal or
the internal 10 kHz low speed oscillator.
1 = Chip enter the power down mode instant or wait CPU sleep command WFI
0 = Chip operating normally or chip in idle mode because of WFI command
Power Down Mode Wake-up Interrupt Status
Set by “power down wake-up event”, it indicates that resume from power down mode”
The flag is set if the GPIO, USB, UART, WDT, CAN, ACMP, BOD or RTC wake-up
occurred
Write 1 to clear the bit to zero.
Note: This bit is working only if PD_WU_INT_EN (PWRCON[5]) set to 1.
Power Down Mode Wake-up Interrupt Enable (write-protection bit)
0 = Disable
1 = Enable
The interrupt will occur when both PD_WU_STS and PD_WU_INT_EN are high.
Enable the Wake-up Delay Counter (write-protection bit)
When the chip wakes up from power down mode, the clock control will delay certain
clock cycles to wait system clock stable.
The delayed clock cycle is 4096 clock cycles when chip work at external 4~24 MHz
high speed crystal, and 256 clock cycles when chip work at internal 22.1184 MHz high
speed oscillator.
1 = Enable clock cycles delay
0 = Disable clock cycles delay
Internal 10 kHz Low Speed Oscillator Enable (write-protection bit)
1 = Enable internal 10 kHz low speed oscillator
0 = Disable internal 10 kHz low speed oscillator
Internal 22.1184 MHz High Speed Oscillator Enable (write-protection bit)
1 = Enable internal 22.1184 MHz high speed oscillator
0 = Disable internal 22.1184 MHz high speed oscillator
External 32.768 kHz Low Speed Crystal Enable (write-protection bit)
1 = Enable external 32.768 kHz low speed crystal (Normal operation)
0 = Disable external 32.768 kHz low speed crystal
External 4~24 MHz High Speed Crystal Enable (write-protection bit)
The bit default value is set by flash controller user configuration register config0
[26:24]. When the default clock source is from external 4~24 MHz high speed crystal,
this bit is set to 1 automatically
1 = Enable external 4~24 MHz high speed crystal
0 = Disable external 4~24 MHz high speed crystal
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Publication Release Date: June 14, 2011
Revision V2.01