NUC130RE3CN Nuvoton Technology Corporation of America, NUC130RE3CN Datasheet - Page 340

• Manufacturer Part Number: NUC130RE3CN
• Description: IC MCU 32BIT 128KB FLASH 64LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro™ NUC100r

Specifications of NUC130RE3CN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

NuMicro™ NUC130/NUC140 Technical Reference Manual
5.12.6 RS-485 function mode
The UART support RS-485 9-bit mode function . The RS-485 mode is selected by setting the
UA_FUN_SEL register to select RS-485 function. The RS-485 driver control is implemented using
the RTS control signal from an asynchronous serial port to enable the RS-485 driver. In RS-485
mode, many characteristics of the RX and TX are same as UART.
When in RS-485 mode, the controller can configuration of it as an RS-485 addressable slave and
th
the RS-485 master transmitter will identify an address character by setting the parity (9
bit) to 1.
For data characters, the parity is set to 0. Software can use UA_LCR register to control the 9-th
bit (When the PBE , EPE and SPE are set, the 9-th bit is transmitted 0 and when PBE and SPE
are set and EPE is cleared, the 9-th bit is transmitted 1). The Controller support three operation
mode that is RS-485 Normal Multidrop Operation Mode (NMM), RS-485 Auto Address Detection
Operation Mode (AAD) and RS-485 Auto Direction Control Operation Mode (AUD), software can
choose any operation mode by programming UA_RS-485_CSR register, and software can driving
the transfer delay time between the last stop bit leaving the TX-FIFO and the de-assertion of by
setting UA_TOR [DLY] register.
RS-485 Normal Multidrop Operation Mode (NMM)
In RS-485 Normal Multidrop operation mode, in first, software must decided the data which
before the address byte be detected will be stored in RX-FIFO or not. If software want to ignore
any data before address byte detected, the flow is set UART_FCR[RS485_RX_DIS] then enable
UA_RS-485[RS485_NMM] and the receiver will ignore any data until an address byte is detected
(bit9 =1) and the address byte data will be stored in the RX-FIFO. If software wants to receive any
data before address byte detected, the flow is disable UART_FCR [RS485_RX_DIS] then enable
UA_RS-485[RS485_NMM] and the receiver will received any data. If an address byte is detected
(bit9 =1), it will generator an interrupt to CPU and software can decide whether enable or disable
receiver to accept the following data byte by setting UA_RS-485_CSR [RX_DIS]. If the receiver is
be enabled, all received byte data will be accepted and stored in the RX-FIFO, and if the receiver
is disabled, all received byte data will be ignore until the next address byte be detected. If
software disable receiver by setting UA_RS-485_CSR [RX_DIS] register, when a next address
byte be detected, the controller will clear the UA_RS-485_CSR [RX_DIS] bit and the address byte
data will be stored in the RX-FIFO.
RS-485 Auto Address Detection Operation Mode (AAD)
In RS-485 Auto Address Detection Operation Mode, the receiver will ignore any data until an
address byte is detected (bit9 =1) and the address byte data match the UA_RS-
485[ADDR_MATCH] value. The address byte data will be stored in the RX-FIFO. The all received
byte data will be accepted and stored in the RX-FIFO until and address byte data not match the
UA_RS-485[ADDR_MATCH] value.
RS-485 Auto Direction Mode (AUD)
Another option function of RS-485 controllers is RS-485 auto direction control function . The
RS-485 driver control is implemented using the RTS control signal from an asynchronous serial
port to enable the RS-485 driver. The RTS line is connected to the RS-485 driver enable such
that setting the RTS line to high (logic 1) enables the RS-485 driver. Setting the RTS line to low
(logic 0) puts the driver into the tri-state condition. User can setting LEV_RTS in UA_MCR register
to change the RTS driving level.
Publication Release Date: June 14, 2011
- 340 -
Revision V2.01