AT89C5131A-RDTIM Atmel, AT89C5131A-RDTIM Datasheet - Page 138
AT89C5131A-RDTIM
Manufacturer Part Number
AT89C5131A-RDTIM
Description
C5131A 32K FLASH USB VQFP64 IND, 5V
Manufacturer
Atmel
Datasheet
1.AT89C5131A-RDTIM.pdf
(176 pages)
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AT89C5131
Table 92. USBIEN Register
USBIEN (S:BEh)
USB Global Interrupt Enable Register
Reset Value = 10h
Table 93. USBADDR Register
USBADDR (S:C6h)
USB Address Register
Reset Value = 80h
Bit Number
Bit Number Bit Mnemonic Description
FEN
6-0
7-6
7
7
-
7
5
4
3
2
1
0
Mnemonic Description
UADD[6:0]
UADD6
EWUPCPU
EEOFINT
ESOFINT
ESPINT
FEN
Bit
6
6
-
-
-
-
Function Enable
Set this bit to enable the address filtering function.
Cleared this bit to disable the function.
USB Address
This field contains the default address (0) after power-up or USB bus reset.
It will be written with the value set by a SET_ADDRESS request received by the
device firmware.
EWUPCPU
UADD5
Reserved
The value read from these bits is always 0. Do not set these bits.
Enable Wake Up CPU Interrupt
Set this bit to enable Wake Up CPU Interrupt. (See “USBIEN Register
USBIEN (S:BEh) USB Global Interrupt Enable Register” on page 136)
Clear this bit to disable Wake Up CPU Interrupt.
Enable End Of Reset Interrupt
Set this bit to enable End Of Reset Interrupt. (See “USBIEN Register USBIEN
(S:BEh) USB Global Interrupt Enable Register” on page 136). This bit is set
after reset.
Clear this bit to disable End Of Reset Interrupt.
Enable SOF Interrupt
Set this bit to enable SOF Interrupt. (See “USBIEN Register USBIEN (S:BEh)
USB Global Interrupt Enable Register” on page 136).
Clear this bit to disable SOF Interrupt.
Reserved
The value read from this bit is always 0. Do not set this bit.
Reserved
The value read from this bit is always 0. Do not set this bit.
Enable Suspend Interrupt
Set this bit to enable Suspend Interrupts (see the “USBIEN Register USBIEN
(S:BEh) USB Global Interrupt Enable Register” on page 136).
Clear this bit to disable Suspend Interrupts.
5
5
EEORINT
UADD4
4
4
ESOFINT
UADD3
3
3
UADD2
2
2
-
UADD1
1
1
-
4136C–USB–04/05
ESPINT
UADD0
0
0
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