AT89C5131A-RDTIM Atmel, AT89C5131A-RDTIM Datasheet - Page 31
AT89C5131A-RDTIM
Manufacturer Part Number
AT89C5131A-RDTIM
Description
C5131A 32K FLASH USB VQFP64 IND, 5V
Manufacturer
Atmel
Datasheet
1.AT89C5131A-RDTIM.pdf
(176 pages)
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Loading the Column Latches
Programming the Flash Spaces
User
4136C–USB–04/05
Any number of data from 1 byte to 128 bytes can be loaded in the column latches. This
provides the capability to program the whole memory by byte, by page or by any number
of bytes in a page.
When programming is launched, an automatic erase of the locations loaded in the col-
umn latches is first performed, then programming is effectively done. Thus, no page or
block erase is needed and only the loaded data are programmed in the corresponding
page.
The following procedure is used to load the column latches and is summarized in
Figure 15:
•
•
•
•
•
Figure 15. Column Latches Loading Procedure
The following procedure is used to program the User space and is summarized in
Figure 16:
•
•
•
•
Note:
Map the column latch space by setting FPS bit.
Load the DPTR with the address to load.
Load Accumulator register with the data to load.
Execute the MOVX @DPTR, A instruction.
If needed loop the three last instructions until the page is completely loaded.
Load data in the column latches from address 0000h to 7FFFh
Disable the interrupts.
Launch the programming by writing the data sequence 50h followed by A0h in
FCON register.
The end of the programming indicated by the FBUSY flag cleared.
Enable the interrupts.
1. The last page address used when loading the column latch is the one used to select
the page programming address.
Column Latches Mapping
Exec: MOVX @DPTR, A
Data memory Mapping
Column Latches
DPTR = Address
ACC = Data
Data Load
Last Byte
Loading
to load?
FPS = 1
FPS = 0
AT89C5131
(1)
.
31
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