AT89C5131A-RDTIM Atmel, AT89C5131A-RDTIM Datasheet - Page 19
AT89C5131A-RDTIM
Manufacturer Part Number
AT89C5131A-RDTIM
Description
C5131A 32K FLASH USB VQFP64 IND, 5V
Manufacturer
Atmel
Datasheet
1.AT89C5131A-RDTIM.pdf
(176 pages)
- Current page: 19 of 176
- Download datasheet (3Mb)
Clock Controller
Introduction
Figure 5. Oscillator Block Diagram
Oscillator
4136C–USB–04/05
X1
X2
PLLCON.2
EXT48
PCON.1
PD
The AT89C5131 clock controller is based on an on-chip oscillator feeding an on-chip
Phase Lock Loop (PLL). All the internal clocks to the peripherals and CPU core are gen-
erated by this controller.
The AT89C5131 X1 and X2 pins are the input and the output of a single-stage on-chip
inverter (see Figure 5) that can be configured with off-chip components as a Pierce
oscillator (see Figure 6). Value of capacitors and crystal characteristics are detailed in
the section “DC Characteristics”.
The X1 pin can also be used as input for an external 48 MHz clock.
The clock controller outputs three different clocks as shown in Figure 5:
•
•
•
These clocks are enabled or disabled depending on the power reduction mode as
detailed in Section “Power Management”, page 146.
Two clock sources are available for CPU:
•
•
In order to optimize the power consumption, the oscillator inverter is inactive when the
PLL output is not selected for the USB device.
a clock for the CPU core
a clock for the peripherals which is used to generate the Timers, PCA, WD, and Port
sampling clocks
a clock for the USB controller
Crystal oscillator on X1 and X2 pins: Up to 32 MHz
External 48 MHz clock on X1 pin
PLL
0
1
÷
2
CKCON.0
X2
0
1
PCON.0
IDL
AT89C5131
USB
Clock
Peripheral
Clock
CPU Core
Clock
19
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