AT89C5131A-RDTIM Atmel, AT89C5131A-RDTIM Datasheet - Page 97
AT89C5131A-RDTIM
Manufacturer Part Number
AT89C5131A-RDTIM
Description
C5131A 32K FLASH USB VQFP64 IND, 5V
Manufacturer
Atmel
Datasheet
1.AT89C5131A-RDTIM.pdf
(176 pages)
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Serial Peripheral Status Register
(SPSTA)
96
AT89C5131
Reset Value = 0001 0100b
Not bit addressable
The Serial Peripheral Status Register contains flags to signal the following conditions:
•
•
•
Table 76 describes the SPSTA register and explains the use of every bit in the register.
Table 76. SPSTA Register
SPSTA - Serial Peripheral Status and Control register (0C4H)
Number
Number
Bit
SPIF
Data transfer complete
Write collision
Inconsistent logic level on SS pin (mode fault error)
Bit
2
1
7
7
6
5
4
3
Bit Mnemonic Description
Mnemonic Description
SSERR
WCOL
WCOL
MODF
SPR1
SPR0
SPIF
Bit
6
-
Serial Peripheral data transfer flag
Cleared by hardware to indicate data transfer is in progress or has been
approved by a clearing sequence.
Set by hardware to indicate that the data transfer has been completed.
Write Collision flag
Cleared by hardware to indicate that no collision has occurred or has been
approved by a clearing sequence.
Set by hardware to indicate that a collision has been detected.
Synchronous Serial Slave Error flag
Set by hardware when SS is de-
asserted before the end of a received data.
Cleared by disabling the SPI (clearing SPEN bit in SPCON).
Mode Fault
Cleared by hardware to indicate that the SS pin is at appropriate logic level, or
has been approved by a clearing sequence.
Set by hardware to indicate that the SS pin is at inappropriate logic level.
Reserved
The value read from this bit is indeterminate. Do not set this bit
SPR2
0
0
0
0
1
1
1
1
SSERR
5
0
0
1
1
0
0
1
1
SPR1
MODF
4
0
1
0
1
0
1
0
1
SPR0
Serial Peripheral Rate
Invalid
F
F
F
F
F
F
Invalid
CLK PERIPH/
CLK PERIPH/
CLK PERIPH/
CLK PERIPH/
CLK PERIPH/
CLK PERIPH/
3
-
4
8
16
32
64
128
2
-
1
-
4136C–USB–04/05
0
-
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