DS21352L+ Maxim Integrated Products, DS21352L+ Datasheet - Page 26

• Manufacturer Part Number: DS21352L+
• Description: IC TXRX T1 1-CHIP 3.3V 100-LQFP
• Manufacturer: Maxim Integrated Products

Specifications of DS21352L+

• Function: Single-Chip Transceiver
• Interface: HDLC, T1
• Number Of Circuits: 1
• Voltage - Supply: 3.14 V ~ 3.47 V
• Current - Supply: 75mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Includes: DSX-1 and CSU Line Build-Out Generator, HDLC Controller, In-Band Loop Code Generator and Detector
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -

5. PARALLEL PORT
The SCT is controlled via either a non–multiplexed (MUX = 0) or a multiplexed (MUX = 1) bus by an
external microcontroller or microprocessor. The SCT can operate with either Intel or Motorola bus timing
configurations. If the BTS pin is tied low, Intel timing will be selected; if tied high, Motorola timing will
be selected. All Motorola bus signals are listed in parenthesis (). See the timing diagrams in the A.C.
Electrical Characteristics in Section 24 for more details.
5.1 REGISTER MAP
Table 5-1 REGISTER MAP SORTED BY ADDRESS
Table 5-1 REGISTER MAP SORTED BY ADDRESS (Cont.)
ADDRESS
ADDRESS
0D
1D
0A
0B
0C
0E
1A
1B
1C
1E
00
01
02
03
04
05
06
07
08
09
0F
10
11
12
13
14
15
16
17
18
19
1F
20
21
22
23
24
25
26
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
R
R
R
R
R
R
R
R
–
–
–
–
HDLC Control
HDLC Status
HDLC Interrupt Mask
Receive HDLC Information
Receive Bit Oriented Code
Receive HDLC FIFO
Transmit HDLC Information
Transmit Bit Oriented Code
Transmit HDLC FIFO
Test 2 SEE NOTE 1
Common Control 7
not present
not present
not present
not present
Device ID
Receive Information 3
Common Control 4
In–Band Code Control
Transmit Code Definition
Receive Up Code Definition
Receive Down Code Definition
Transmit Channel Control 1
Transmit Channel Control 2
Transmit Channel Control 3
Common Control 5
Transmit DS0 Monitor
Receive Channel Control 1
Receive Channel Control 2
Receive Channel Control 3
Common Control 6
Receive DS0 Monitor
Status 1
Status 2
Receive Information 1
Line Code Violation Count 1
Line Code Violation Count 2
Path Code Violation Count 1 SEE NOTE 3
Path Code violation Count 2
REGISTER NAME
REGISTER NAME
26 of 137
ABBREVIATION
ABBREVIATION
TEST2 (set to 00h)
REGISTER
REGISTER
LCVCR1
LCVCR2
PCVCR1
PCVCR2
RDNCD
RUPCD
TDS0M
RDS0M
RBOC
HIMR
RHFR
TBOC
THFR
CCR7
CCR4
TCC1
TCC2
TCC3
CCR5
RCC1
RCC2
RCC3
CCR6
RHIR
THIR
IBCC
RIR3
RIR1
HCR
TCD
HSR
IDR
SR1
SR2
–
–
–
–
DS21352/DS21552